Abstract: There is disclosed a data input buffer for buffering external input signals into signals suitable for internal signals in a semiconductor memory device. The data input buffer includes switching means controlled by first and second determination signals; and a buffering circuit which is operated as a SSTL buffer or a LVTTL buffer according to the operation of the switching means.

Abstract: A refresh period automatic detecting device for a semiconductor memory device including a power-up detector unit detecting power applied from a system; a control unit producing a read/write timing control signal for internal data and at least one control signal to control the overall components of the device in response to an output signal of the power-up detector unit; an internal data generator unit producing internal data in response to the control signal; a comparator unit comparing the internal data with internal data stored in a cell; and a refresh circuit unit determining and storing a refresh period from the time relationship between the read/write timing control signal by the control signal of the control unit if the two data do not correspond to each other.