Patents by Inventor Kyu-Sik Cho

Kyu-Sik Cho has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11975855
    Abstract: A propulsion module of an air mobility vehicle may include a door provided in the housing and opening or closing the opening portion of the housing by a sliding motion of the door; a propeller for providing propulsion to the air mobility vehicle; a link assembly having a first end portion connected to the housing and a second end portion connected to the propeller to pull the propeller into the internal space of the housing through the opening portion or pull the propeller outside the internal space through the opening portion; and a door opening and closing portion coupled to the door and configured for providing an opening and closing force to the door according to an inward-pulling motion or an outward-pulling motion of the propeller.
    Type: Grant
    Filed: August 20, 2021
    Date of Patent: May 7, 2024
    Assignees: Hyundai Motor Company, Kia Corporation
    Inventors: Chung Sik Yim, Yong Hyun Nam, Jae Young Choi, Sang Hyun Jung, Dae Hee Lee, Jae Seung Lee, Kyu Hoon Cho
  • Publication number: 20230350524
    Abstract: A display apparatus includes a substrate including a display region and a non-display region, a display element layer, a pad group, a touch electrode layer, and a touch insulating layer. The display element layer includes display elements provided in the display region in a plan view. The pad group may include output pads provided on substrate and provided in the non-display region in the plan view. The touch electrode layer is provided on the display element layer. The touch insulating layer is provided on the display element layer and contacts the touch electrode layer. An intaglio pattern is provided in the touch insulating layer overlapped with the non-display region, and the intaglio pattern is not overlapped with the pad group.
    Type: Application
    Filed: May 23, 2023
    Publication date: November 2, 2023
    Inventors: Kiwook KIM, Kyongtae PARK, Hyesong KWUN, Dae-won LEE, Donghoon JEONG, Won-kyu KWAK, Kwangmin KIM, Joongsoo MOON, Changkyu JIN, Kyu-sik CHO, Sungho CHO
  • Patent number: 11720213
    Abstract: A display apparatus includes a substrate including a display region and a non-display region, a display element layer, a pad group, a touch electrode layer, and a touch insulating layer. The display element layer includes display elements provided in the display region in a plan view. The pad group may include output pads provided on substrate and provided in the non-display region in the plan view. The touch electrode layer is provided on the display element layer. The touch insulating layer is provided on the display element layer and contacts the touch electrode layer. An intaglio pattern is provided in the touch insulating layer overlapped with the non-display region, and the intaglio pattern is not overlapped with the pad group.
    Type: Grant
    Filed: June 13, 2022
    Date of Patent: August 8, 2023
    Assignee: SAMSUNG DISPLAY CO., LTD.
    Inventors: Kiwook Kim, Kyongtae Park, Hyesong Kwun, Dae-won Lee, Donghoon Jeong, Won-kyu Kwak, Kwangmin Kim, Joongsoo Moon, Changkyu Jin, Kyu-sik Cho, Sungho Cho
  • Publication number: 20230245612
    Abstract: A scan driver includes a plurality of stages. An nth (n is a natural number) stage among the stages includes: a first and a second input circuit for controlling a voltage of a first node in response to a carry signal of a previous stage and a next stage, respectively; a first output circuit for outputting an nth carry signal corresponding to a carry clock signal in response to the voltage of the first node; a second output circuit for outputting an nth scan and an nth sensing signal corresponding to a scan and a sensing clock signal, respectively, in response to the voltage of the first node; and a sampling circuit for storing the carry signal of the previous stage in response to a first select signal, and for supplying a control voltage to the first node in response to a second select signal and the stored carry signal.
    Type: Application
    Filed: April 10, 2023
    Publication date: August 3, 2023
    Inventors: Kang Nam KIM, Sung Hoon LIM, Woo Geun LEE, Kyu Sik CHO, Jae Beom CHOI
  • Patent number: 11710442
    Abstract: A gate driving circuit includes a plurality of unit stages connected to each other, wherein each of the plurality of unit stages includes a first transistor having a lower gate electrode, an upper gate electrode disposed on the lower gate electrode, an active layer disposed between the lower gate electrode and the upper gate electrode, a first electrode contacting a first portion of the active layer, and a second electrode contacting a second portion of the active layer, a first capacitor defined by a first region in which the lower gate electrode and the upper gate electrode overlap, and a second capacitor defined by a second region in which the upper gate electrode and the first electrode overlap, wherein the upper gate electrode and the lower gate electrode are electrically coupled to each other in the first region where the upper gate electrode and the lower gate electrode overlap to form the first capacitor.
    Type: Grant
    Filed: September 22, 2021
    Date of Patent: July 25, 2023
    Assignee: Samsung Display Co., Ltd.
    Inventors: Junhong Na, Kangnam Kim, Sung-Hoon Lim, Woogeun Lee, Kyu-Sik Cho
  • Patent number: 11626060
    Abstract: A scan driver includes a plurality of stages. An nth (n is a natural number) stage among the stages includes: a first and a second input circuit for controlling a voltage of a first node in response to a carry signal of a previous stage and a next stage, respectively; a first output circuit for outputting an nth carry signal corresponding to a carry clock signal in response to the voltage of the first node; a second output circuit for outputting an nth scan and an nth sensing signal corresponding to a scan and a sensing clock signal, respectively, in response to the voltage of the first node; and a sampling circuit for storing the carry signal of the previous stage in response to a first select signal, and for supplying a control voltage to the first node in response to a second select signal and the stored carry signal.
    Type: Grant
    Filed: September 17, 2021
    Date of Patent: April 11, 2023
    Assignee: Samsung Display Co., Ltd.
    Inventors: Kang Nam Kim, Sung Hoon Lim, Woo Geun Lee, Kyu Sik Cho, Jae Beom Choi
  • Patent number: 11521570
    Abstract: A gate driver for a display device includes: a clock signal line to transfer a clock signal; and a plurality of stages to sequentially output a gate signal based upon the clock signal in response to a carry signal. The plurality of stages include a plurality of thin film transistors, and at least one of the plurality of thin film transistors includes a thin film transistor including an oxide semiconductor. The at least one thin film transistor includes a first gate electrode and a second gate electrode disposed in different layers, the oxide semiconductor is disposed between the first gate electrode and the second gate electrode, and the first gate electrode and the second gate electrode are connected to receive a common voltage signal.
    Type: Grant
    Filed: March 4, 2020
    Date of Patent: December 6, 2022
    Assignee: Samsung Display Co., Ltd.
    Inventors: Sung Hoon Lim, Kang Nam Kim, Seok Hwan Bang, Sung Hwan Won, Woo Geun Lee, Kyu Sik Cho, Soo Jung Chae
  • Publication number: 20220308698
    Abstract: A display apparatus includes a substrate including a display region and a non-display region, a display element layer, a pad group, a touch electrode layer, and a touch insulating layer. The display element layer includes display elements provided in the display region in a plan view. The pad group may include output pads provided on substrate and provided in the non-display region in the plan view. The touch electrode layer is provided on the display element layer. The touch insulating layer is provided on the display element layer and contacts the touch electrode layer. An intaglio pattern is provided in the touch insulating layer overlapped with the non-display region, and the intaglio pattern is not overlapped with the pad group.
    Type: Application
    Filed: June 13, 2022
    Publication date: September 29, 2022
    Inventors: Kiwook KIM, Kyongtae PARK, Hyesong KWUN, Dae-won LEE, Donghoon JEONG, Won-kyu KWAK, Kwangmin KIM, Joongsoo MOON, Changkyu JIN, Kyu-sik CHO, Sungho CHO
  • Patent number: 11360621
    Abstract: A display apparatus includes a substrate including a display region and a non-display region, a display element layer, a pad group, a touch electrode layer, and a touch insulating layer. The display element layer includes display elements provided in the display region in a plan view. The pad group may include output pads provided on substrate and provided in the non-display region in the plan view. The touch electrode layer is provided on the display element layer. The touch insulating layer is provided on the display element layer and contacts the touch electrode layer. An intaglio pattern is provided in the touch insulating layer overlapped with the non-display region, and the intaglio pattern is not overlapped with the pad group.
    Type: Grant
    Filed: April 26, 2021
    Date of Patent: June 14, 2022
    Assignee: SAMSUNG DISPLAY CO., LTD.
    Inventors: Kiwook Kim, Kyongtae Park, Hyesong Kwun, Dae-won Lee, Donghoon Jeong, Won-kyu Kwak, Kwangmin Kim, JoongSoo Moon, Changkyu Jin, Kyu-Sik Cho, Sungho Cho
  • Publication number: 20220101775
    Abstract: A gate driving circuit includes a plurality of unit stages connected to each other, wherein each of the plurality of unit stages includes a first transistor having a lower gate electrode, an upper gate electrode disposed on the lower gate electrode, an active layer disposed between the lower gate electrode and the upper gate electrode, a first electrode contacting a first portion of the active layer, and a second electrode contacting a second portion of the active layer, a first capacitor defined by a first region in which the lower gate electrode and the upper gate electrode overlap, and a second capacitor defined by a second region in which the upper gate electrode and the first electrode overlap, wherein the upper gate electrode and the lower gate electrode are electrically coupled to each other in the first region where the upper gate electrode and the lower gate electrode overlap to form the first capacitor.
    Type: Application
    Filed: September 22, 2021
    Publication date: March 31, 2022
    Inventors: Junhong NA, Kangnam Kim, Sung-Hoon Lim, Woogeun Lee, Kyu-Sik Cho
  • Publication number: 20220005402
    Abstract: A scan driver includes a plurality of stages. An nth (n is a natural number) stage among the stages includes: a first and a second input circuit for controlling a voltage of a first node in response to a carry signal of a previous stage and a next stage, respectively; a first output circuit for outputting an nth carry signal corresponding to a carry clock signal in response to the voltage of the first node; a second output circuit for outputting an nth scan and an nth sensing signal corresponding to a scan and a sensing clock signal, respectively, in response to the voltage of the first node; and a sampling circuit for storing the carry signal of the previous stage in response to a first select signal, and for supplying a control voltage to the first node in response to a second select signal and the stored carry signal.
    Type: Application
    Filed: September 17, 2021
    Publication date: January 6, 2022
    Inventors: Kang Nam KIM, Sung Hoon LIM, Woo Geun LEE, Kyu Sik CHO, Jae Beom CHOI
  • Patent number: 11127339
    Abstract: A scan driver includes a plurality of stages. An nth (n is a natural number) stage among the stages includes: a first and a second input circuit for controlling a voltage of a first node in response to a carry signal of a previous stage and a next stage, respectively; a first output circuit for outputting an nth carry signal corresponding to a carry clock signal in response to the voltage of the first node; a second output circuit for outputting an nth scan and an nth sensing signal corresponding to a scan and a sensing clock signal, respectively, in response to the voltage of the first node; and a sampling circuit for storing the carry signal of the previous stage in response to a first select signal, and for supplying a control voltage to the first node in response to a second select signal and the stored carry signal.
    Type: Grant
    Filed: May 15, 2020
    Date of Patent: September 21, 2021
    Assignee: Samsung Display Co., Ltd.
    Inventors: Kang Nam Kim, Sung Hoon Lim, Woo Geun Lee, Kyu Sik Cho, Jae Beom Choi
  • Publication number: 20210240301
    Abstract: A display apparatus includes a substrate including a display region and a non-display region, a display element layer, a pad group, a touch electrode layer, and a touch insulating layer. The display element layer includes display elements provided in the display region in a plan view. The pad group may include output pads provided on substrate and provided in the non-display region in the plan view. The touch electrode layer is provided on the display element layer. The touch insulating layer is provided on the display element layer and contacts the touch electrode layer. An intaglio pattern is provided in the touch insulating layer overlapped with the non-display region, and the intaglio pattern is not overlapped with the pad group.
    Type: Application
    Filed: April 26, 2021
    Publication date: August 5, 2021
    Inventors: Kiwook KIM, Kyongtae PARK, Hyesong KWUN, Dae-won LEE, Donghoon JEONG, Won-kyu KWAK, Kwangmin KIM, JoongSoo MOON, Changkyu JIN, Kyu-sik CHO, Sungho CHO
  • Patent number: 10990233
    Abstract: A display apparatus includes a substrate including a display region and a non-display region, a display element layer, a pad group, a touch electrode layer, and a touch insulating layer. The display element layer includes display elements provided in the display region in a plan view. The pad group may include output pads provided on substrate and provided in the non-display region in the plan view. The touch electrode layer is provided on the display element layer. The touch insulating layer is provided on the display element layer and contacts the touch electrode layer. An intaglio pattern is provided in the touch insulating layer overlapped with the non-display region, and the intaglio pattern is not overlapped with the pad group.
    Type: Grant
    Filed: April 3, 2020
    Date of Patent: April 27, 2021
    Assignee: SAMSUNG DISPLAY CO., LTD.
    Inventors: Kiwook Kim, Kyongtae Park, Hyesong Kwun, Dae-won Lee, Donghoon Jeong, Won-kyu Kwak, Kwangmin Kim, JoongSoo Moon, Changkyu Jin, Kyu-sik Cho, Sungho Cho
  • Publication number: 20200394978
    Abstract: A gate driver for a display device includes: a clock signal line to transfer a clock signal; and a plurality of stages to sequentially output a gate signal based upon the clock signal in response to a carry signal. The plurality of stages include a plurality of thin film transistors, and at least one of the plurality of thin film transistors includes a thin film transistor including an oxide semiconductor. The at least one thin film transistor includes a first gate electrode and a second gate electrode disposed in different layers, the oxide semiconductor is disposed between the first gate electrode and the second gate electrode, and the first gate electrode and the second gate electrode are connected to receive a common voltage signal.
    Type: Application
    Filed: March 4, 2020
    Publication date: December 17, 2020
    Inventors: Sung Hoon LIM, Kang Nam KIM, Seok Hwan BANG, Sung Hwan WON, Woo Geun LEE, Kyu Sik CHO, Soo Jung CHAE
  • Publication number: 20200372851
    Abstract: A scan driver includes a plurality of stages. An nth (n is a natural number) stage among the stages includes: a first and a second input circuit for controlling a voltage of a first node in response to a carry signal of a previous stage and a next stage, respectively; a first output circuit for outputting an nth carry signal corresponding to a carry clock signal in response to the voltage of the first node; a second output circuit for outputting an nth scan and an nth sensing signal corresponding to a scan and a sensing clock signal, respectively, in response to the voltage of the first node; and a sampling circuit for storing the carry signal of the previous stage in response to a first select signal, and for supplying a control voltage to the first node in response to a second select signal and the stored carry signal.
    Type: Application
    Filed: May 15, 2020
    Publication date: November 26, 2020
    Inventors: Kang Nam KIM, Sung Hoon LIM, Woo Geun LEE, Kyu Sik CHO, Jae Beom CHOI
  • Publication number: 20200235192
    Abstract: A display apparatus includes a substrate including a display region and a non-display region, a display element layer, a pad group, a touch electrode layer, and a touch insulating layer. The display element layer includes display elements provided in the display region in a plan view. The pad group may include output pads provided on substrate and provided in the non-display region in the plan view. The touch electrode layer is provided on the display element layer. The touch insulating layer is provided on the display element layer and contacts the touch electrode layer. An intaglio pattern is provided in the touch insulating layer overlapped with the non-display region, and the intaglio pattern is not overlapped with the pad group.
    Type: Application
    Filed: April 3, 2020
    Publication date: July 23, 2020
    Inventors: Kiwook KIM, Kyongtae PARK, Hyesong KWUN, Dae-won LEE, Donghoon JEONG, Won-kyu KWAK, Kwangmin KIM, JoongSoo MOON, Changkyu JIN, Kyu-sik CHO, Sungho CHO
  • Patent number: 10615242
    Abstract: A display apparatus includes a substrate including a display region and a non-display region, a display element layer, a pad group, a touch electrode layer, and a touch insulating layer. The display element layer includes display elements provided in the display region in a plan view. The pad group may include output pads provided on substrate and provided in the non-display region in the plan view. The touch electrode layer is provided on the display element layer. The touch insulating layer is provided on the display element layer and contacts the touch electrode layer. An intaglio pattern is provided in the touch insulating layer overlapped with the non-display region, and the intaglio pattern is not overlapped with the pad group.
    Type: Grant
    Filed: March 14, 2018
    Date of Patent: April 7, 2020
    Assignee: SAMSUNG DISPLAY CO., LTD.
    Inventors: Kiwook Kim, Kyongtae Park, Hyesong Kwun, Dae-won Lee, Donghoon Jeong, Won-kyu Kwak, Kwangmin Kim, JoongSoo Moon, Changkyu Jin, Kyu-sik Cho, Sungho Cho
  • Patent number: 10255855
    Abstract: A pixel of an organic light emitting diode display device includes a scan transistor configured to connect a data line to a first node in response to a scan signal, a storage capacitor connected between the first node and a first power supply voltage, a compensation capacitor connected between the first node and a second node, a driving transistor having a gate connected to the second node, a source connected to the first power supply voltage, and a drain connected to a third node, a compensation transistor configured to connect the second node to the third node in response to a compensation control signal, an organic light emitting diode connected between the third node and a second power supply voltage, and an initialization transistor configured to transfer an initialization voltage in response to an initialization control signal.
    Type: Grant
    Filed: May 18, 2016
    Date of Patent: April 9, 2019
    Assignee: Samsung Display Co., Ltd.
    Inventors: Kyong-Tae Park, Kyu-Sik Cho, Jin-A Lee
  • Publication number: 20180269269
    Abstract: A display apparatus includes a substrate including a display region and a non-display region, a display element layer, a pad group, a touch electrode layer, and a touch insulating layer. The display element layer includes display elements provided in the display region in a plan view. The pad group may include output pads provided on substrate and provided in the non-display region in the plan view. The touch electrode layer is provided on the display element layer. The touch insulating layer is provided on the display element layer and contacts the touch electrode layer. An intaglio pattern is provided in the touch insulating layer overlapped with the non-display region, and the intaglio pattern is not overlapped with the pad group.
    Type: Application
    Filed: March 14, 2018
    Publication date: September 20, 2018
    Inventors: Kiwook KIM, Kyongtae PARK, Hyesong KWUN, Dae-won LEE, Donghoon JEONG, Won-kyu KWAK, Kwangmin KIM, JoongSoo MOON, Changkyu JIN, Kyu-sik CHO, Sungho CHO