Patents by Inventor Kyuichi Hareyama

Kyuichi Hareyama has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 4785262
    Abstract: A pulse generator includes a capacitor having one end held at a reference potential and the other end, a first inverter having a threshold voltage and its input portion connected to the other end of the capacitor, a control circuit producing a signal for discharging the capacitor for a limited time period in response to an output from the first inverter, a switch for discharging the capacitor in response to the discharging signal, a resistor having a resistance, a current controller controlling the current flowing through the resistor to have a value obtained by dividing the threshold voltage by the resistance, and a means for supplying the current to the capacitor, output pulses being derived from input and/or output portion and/or internal portion of the control circuit. The control circuit may be a monostable multivibrator, a delay circuit or the like.
    Type: Grant
    Filed: December 23, 1986
    Date of Patent: November 15, 1988
    Assignee: NEC Corporation
    Inventors: Kazuo Ryu, Kyuichi Hareyama
  • Patent number: 4535257
    Abstract: A comparator circuit operable at a high speed is disclosed. The comparator circuit comprises a differential amplifier having a pair of inputs, and a switch circuit arranged between the pair of inputs, wherein the switch circuit is made conductive state prior to the comparison operation to delete potential difference between the pair of inputs.
    Type: Grant
    Filed: September 28, 1982
    Date of Patent: August 13, 1985
    Assignee: Nippon Electric Co., Ltd.
    Inventor: Kyuichi Hareyama
  • Patent number: 4503421
    Abstract: A digital to analog converter having an improved conversion linearity is disclosed.The digital to analog converter comprises means for receiving an input digital signal (1), means for dividing the first digital signal to a plurality of digital signals (2, 3), a plurality of conversion means (8, 9) for converting the divided digital signals to analog signals, respectively, and means (10) for summing the analog signals to produce a summed analog signal corresponding to the input digital signal.
    Type: Grant
    Filed: May 26, 1982
    Date of Patent: March 5, 1985
    Assignee: Nippon Electric Co., Ltd.
    Inventors: Kyuichi Hareyama, Kenji Shiraki, Kazuo Ryu
  • Patent number: 4490634
    Abstract: A semiconductor circuit having an improved current switching function is disclosed. The circuit comprises at least one current switch unit including a current source, a current output node, a field effect transistor connected between the current output node and the current source, an inverting amplifier having an output supplied to a gate of the field effect transistor and an input connected to the junction point of the current source and the field effect transistor and means for controlling operation of the amplifier.
    Type: Grant
    Filed: March 22, 1983
    Date of Patent: December 25, 1984
    Assignee: Nippon Electric Co., Ltd.
    Inventor: Kyuichi Hareyama
  • Patent number: 4393370
    Abstract: A semiconductor circuit having an improved current switching function is disclosed. The circuit comprises at least one current switch unit including a current source, a current output node, a field effect transistor connected between the current output node and the current source, an inverting amplifier having an output supplied to a gate of the field effect transistor and an input connected to the junction point of the current source and the field effect transistor and means for controlling operation of the amplifier.
    Type: Grant
    Filed: April 29, 1981
    Date of Patent: July 12, 1983
    Assignee: Nippon Electric Co., Ltd.
    Inventor: Kyuichi Hareyama
  • Patent number: 4270081
    Abstract: A constant-current circuit is especially well-suited for construction as a semiconductor integrated circuit, and it is stable over a wide range of variations in power potential. The constant-current circuit produces first to third biasing potentials. A first current source produces a first current responsive to the first bias potential. A second current source produces a second current responsive to the second bias potential, and a third current source produces a third current responsive to the third bias potential. A constant current output is obtained by subtracting the second current from the sum of the first and third currents.
    Type: Grant
    Filed: October 10, 1979
    Date of Patent: May 26, 1981
    Assignee: Nippon Electric Co., Ltd.
    Inventor: Kyuichi Hareyama
  • Patent number: 4268820
    Abstract: An analog-to-digital converter of the integrating type is disclosed in which, while an analog input signal is integrated over a first period, a reference signal is selectively superposed on the analog input signal during the first period when the integrated value exceeds a predetermined value, so as to reduce the absolute value of the integrated value of the analog input signal, and then at the termination of the first period the integrated value is inversely integrated by a reference signal (a separate reference signal or the same reference signal as above-mentioned), a period within the first period during which the reference signal is superposed and the second period, i.e., from the beginning of the inverse integration after the first period to the time point that the integrated value reaches the predetermined value being used to produce an output in a digital form.
    Type: Grant
    Filed: September 11, 1978
    Date of Patent: May 19, 1981
    Assignee: Nippon Electric Co., Ltd.
    Inventor: Kyuichi Hareyama
  • Patent number: 4251743
    Abstract: A current source circuit particularly adapted for use with an analog-to-digital converter having automatic scale adjustment. A first current source produces a fixed reference current of a first value in accordance with the scale adjustment while a second current source produces a second current of which the value is controlled by the output of a differential amplifier coupled to the control input of the second current source. A detector circuit is provided for determining the difference between the second current value and the reference value. The detected difference value is fed back to a control input of the amplifier to make the second current value equal to the reference value by reducing the difference.
    Type: Grant
    Filed: October 30, 1978
    Date of Patent: February 17, 1981
    Assignee: Nippon Electric Co., Ltd.
    Inventor: Kyuichi Hareyama
  • Patent number: 4087758
    Abstract: A reference voltage source circuit includes two transistors having their collectors connected to the input terminals of a differential amplifier. The transistor terminals are connected in common, and to the output of the amplifier.In accordance with one aspect of the present invention, variable resistance structure is employed to control the collector currents in the transistor to maintain the temperature-output voltage transfer characteristic at a low level. In accordance with another aspect of the present invention, the transistor supply may depend from the amplifier output to reduce the influence of supply voltage variations on the regulated output potential.
    Type: Grant
    Filed: July 20, 1976
    Date of Patent: May 2, 1978
    Assignee: Nippon Electric Co., Ltd.
    Inventor: Kyuichi Hareyama
  • Patent number: 3943431
    Abstract: A current-splitting network comprises a voltage divider having first and second output terminals, the potentials at the first and second output terminals having a predetermined ratio. A first amplifier is coupled between one end of a first resistor and the first output terminal for holding the potential of the one end of the first resistor substantially at the potential of the first output terminal. A second resistor has a resistance value which has a predetermined ratio to the resistance value of the first resistor, and a second amplifier is coupled between one end of the second resistor and the second output terminal to hold the potential of the one end of the second resistor substantially at the potential of the second output terminal. A constant-current source is connected in common to the other end of the first and second resistors such that a constant current fed from the constant-current source is split to flow through the first and second resistors.
    Type: Grant
    Filed: December 20, 1974
    Date of Patent: March 9, 1976
    Assignee: Nippon Electric Company, Limited
    Inventor: Kyuichi Hareyama
  • Patent number: RE29676
    Abstract: A plurality of resistance elements arranged in an n-row by n-column matrix are of substantially equal lengths and widths. The sides of the resistance elements which are in common rows and columns are colinear and first and second electrodes are provided at substantially the same location on each resistance element. The electrodes of the resistance elements are connected in a manner such that a series connection is formed between resistance elements belonging to different adjacent columns in the matrix between two sets of n external terminals.
    Type: Grant
    Filed: October 4, 1976
    Date of Patent: June 20, 1978
    Assignee: Nippon Electric Company, Limited
    Inventors: Kyuichi Hareyama, Shuzi Nakazawa