Abstract: A method and terminal device for executing a radio application is disclosed. The method for executing a radio application is a method for executing a radio application independent of a modem in a terminal device, comprising the steps of: communicating with each other using a reconfigurable radio frequency interface (RRFI) by a unified radio application (URA), which operates on a radio computer of the terminal device, and a radio frequency (RF) transceiver, which operates in a radio platform on the radio computer; and supporting, by the RRFI, at least one service among a spectrum control service, a power control service, an antenna management service, a transmission/reception chain control service, and a radio virtual machine protection service.

Abstract: A delay circuit includes: a plurality of delay units that are serially coupled with each other in a form of loop and sequentially delay an input signal of the delay circuit; an input control unit that selects a delay unit to receive the input signal of the delay circuit among the plurality of the delay units; and an output control unit that controls an output signal of a predetermined delay unit among the plurality of the delay units to be outputted as an output signal of the delay circuit, when the output signal of the predetermined delay unit is enabled N times, where N is an integer equal to or greater than 0.

Abstract: An aligning bite of an X-ray device for aligning a subject to an X-ray imaging point and an X-ray device having the same are disclosed. The aligning bite of an X-ray may include a support unit being rotatably connected to a bite stand supporting the aligning bite, and a bite unit being rotatably connected to the support unit, wherein the support unit may include a link frame supporting the bite unit by connecting the bite unit to the bite stand, a first joint rotatably connecting one side of the link frame to the bite stand, a second joint rotatably connecting the bite unit to another side of the link frame, and a third joint being provided between the first joint and the second joint so as to allow the link frame to be folded.

Abstract: An internal voltage generation circuit may be provided. The internal voltage generation circuit may include a first internal voltage generation circuit configured to provide a reference internal voltage to either an internal voltage control circuit or a node at which an output internal voltage is generated. The internal voltage generation circuit may include a second internal voltage generation circuit configured to change a level of the output internal voltage. The internal voltage generation circuit may include an internal voltage control circuit configured to compare the reference internal voltage with the output internal voltage and control the first and second internal voltage generation circuits to change the level of the output internal voltage according to a comparison.

Abstract: A clock generation circuit may be provided. The clock generation circuit may include a master DLL (Delay Locked Loop) circuit, a code divider and a slave DLL circuit. The master DLL may generate a phase pulse signal having a pulse width corresponding to one cycle of a clock signal, and may generate a delay control code corresponding to the phase pulse signal. The code divider may generate a divided delay control code corresponding to a predetermined time by dividing the delay control code. The slave DLL circuit may generate a delayed strobe signal by delaying a strobe signal according to the divided delay control code.

Abstract: A clock data recovery circuit may include: a phase comparison unit suitable for comparing input data with a phase of a multi-phase clock, and for generating an up/down signal corresponding to the comparison result; a filtering unit suitable for counting the up/down signal based on an upper threshold value and a lower threshold value, for setting, when an overflow occurs, the lower threshold value to an initial value for the count of the up/down signal, or when a underflow occurs, the upper threshold value to the initial value for the count of the up/down signal, and for generating a control code corresponding to one of the underflow and the overflow; and a phase rotating unit suitable for adjusting the phase of the multi-phase clock in response to the control code outputted from the filtering unit.

Abstract: A cooling and heating control method of a multi type air conditioner in which a target pressure of a compressor is adjusted based on conditions of respective indoor units so as to reduce power consumption is provided. The cooling control method includes determining the indoor unit desired to execute power saving control, judging whether or not a difference between a temperature of a space in which the indoor unit desired to execute power saving control is located and a set temperature of the indoor unit is less than a reference value, raising a target evaporation temperature of the indoor unit upon judging that the difference is less than the reference value, comparing an evaporation temperature of the indoor unit with the raised target evaporation temperature, and raising an evaporation pressure of a compressor, when the evaporation temperature of the indoor unit is lower than the raised target evaporation temperature.

Abstract: Provided is a gate driving unit including: a plurality of stages configured to be activated sequentially so as to generate gate signals; and a plurality of repair blocks having sizes smaller than the corresponding stages and configured to repair defects of the stages. Each of the repair blocks is disposed proximate to two or more stages so as to be configured to repair defects in the two or more stages.

Abstract: An electrostatic discharging circuit includes a first transistor including a first electrode electrically connected to a signal line, a second electrode receiving a first voltage, and a first gate electrode electrically connected to a first node. A second transistor includes a third electrode electrically connected to the signal line, a fourth electrode electrically connected to the first node, and a second gate electrode electrically connected to the first node. A first capacitor receives the first voltage and is electrically connected to the first node.

Abstract: A semiconductor system may include a first semiconductor device configured to output a command and receive data. The semiconductor system may include a second semiconductor device configured to generate a periodic signal, the periodic signals periodically toggled in response to the command, output the data in response to the periodic signal, and discharge the charges of an internal node if the periodic signal is not toggled during a predetermined section.

Abstract: A random number generation circuit may include a memory block. The random number generation circuit may include a fuse block configured to store an address of a failed memory cell from a memory cell array of the memory block, as a repair address, and generate a match signal by comparing the repair address with a normal address inputted from an exterior. The random number generation circuit may include a register configured to output a true random number by latching an address corresponding to activation timing of the match signal among normal addresses.

Abstract: The gate driving circuit includes an (m?1)-th stage externally receiving a first dummy signal for a first time period to control a turn-off, an m-th stage externally receiving a second dummy signal for the first time period to control the turn-off, an (m?2)-th stage receiving an m-th carry signal for a second time period from the m-th stage and externally receiving the second dummy signal for the second time period to control the turn-off, and an (m?3)-th stage receiving an (m?1)-th carry signal for the second time period from the (m?1)-th stage and externally receiving the first dummy signal for the first time period to control the turn-off, wherein the first time period is longer than the second time period.

Abstract: A phase detection circuit includes a sampling signal generation circuit configured to generate a plurality of sampling signals in response to a plurality of phase change clocks having different phases and data; a charging voltage generation circuit configured to compare the plurality of sampling signals, and change a voltage level of one charging voltage between a first charging voltage and a second charging voltage; and a comparison circuit configured to compare voltage levels of the first and second charging voltages, and generate a result signal.

Abstract: A multi-network based-simultaneous data transmission service is performed by: transmitting, over one or more networks, two or more partial data divided from data to be transmitted in relation to a particular service; when a network switching of the one or more networks is required, identifying a type of the particular service; and performing the network switching at a network switching timing controlled based on the identified type of the particular service.

Abstract: Disclosed are a transmission device, a reception device and a method for providing a simultaneous data transmission for a data session through a plurality of heterogeneous networks. The transmission device divides particular data to be transmitted into two or more partial data, transmits first partial data after inserting first tunneling information which induces the first partial data to pass through a first network of two or more networks into the first partial data, and transmits second partial data of the two or more partial data after inserting second tunneling information which induces the second partial data to pass through a second network of the two or more networks into the second partial data.

Abstract: Disclosed is a method for distributing, installing, and operating a software-defined radio-based radio application independent of hardware and a user application. A radio application distribution method for installing a radio application in a user terminal using a radio application package comprises the steps of: generating a radio application package including a radio controller code, compiled by an application processor compiler, and a user-defined function block; and uploading the radio application package to a server, wherein the radio controller code is in the form of an execution code executed by an application processor or radio computer of the user terminal, and provides a user application of the user terminal with context information of a radio application to be installed in the user terminal or defines a radio controller for transmitting and receiving data with a networking stack of a communication service layer located in the application processor.

Abstract: Embodiments of the present disclosure relate to an outdoor unit of an air conditioner configured to cool a heating unit by making contact with the heating unit, a cooling unit applied thereto, and a method for manufacturing the cooling unit. An outdoor unit of an air conditioner comprises a compressor configured to compress refrigerant; a condenser configured to condense the refrigerant discharged from the compressor; a control box provided with an electronic component configured to control an outdoor unit of an air conditioner; and a cooling unit configured to cool a heating unit by making contact with the heating unit of the electronic component, wherein the cooling unit comprises a heat radiating member having one side thereof make contact with the heating unit; and a refrigerant pipe extended by penetrating through the heat radiating member and in which refrigerant is moved.

Abstract: A semiconductor device with impedance calibration includes a first channel circuit of a first channel and a second channel circuit of a second channel. The first channel circuit is configured to drive a first node in response to a flag signal, generate a start signal from a signal of the first node to execute a first calibration operation in response to a mask signal, and generate and output an end signal after termination of the first calibration operation. The second channel circuit is configured to generate a transmission start signal from the end signal to execute a second calibration operation.

Abstract: A display device includes: a gate electrode, a gate line, and data lines on a substrate, the data lines in a same layer as the gate line; a gate insulating layer on the gate line; a semiconductor member on the gate insulating layer; an etch stopper layer on the semiconductor member and the gate insulating layer; a first passivation layer on the etch stopper layer; a source electrode on the first passivation layer and the etch stopper layer and connected to the data lines; a drain electrode on the etch stopper layer; a common electrode on the first passivation layer and separated from the source electrode and the drain electrode; a second passivation layer on the source electrode, the drain electrode and the common electrode; and a pixel electrode on the second passivation layer and connected to the drain electrode.

Abstract: An air conditioner is provided that includes a heat exchanger including a refrigerant tube, a fin assembly, and a fan assembly located at an upper portion of the heat exchanger. The heat exchanger includes a first heat exchanger adjacent to the fan assembly and a second heat exchanger under the first heat exchanger. A density of a fin assembly at the first heat exchanger is larger than that of a fin assembly at the second heat exchanger. Performance of the air conditioner may be enhanced using different types of heat exchangers. The heat exchanger may include a plurality of layers with a refrigerant introduced into each of inlet pipes of the heat exchanger flowing evenly at each of the layers. The refrigerant to be discharged to each of outlet pipes is discharged at the same temperature. Thus, cooling and warming performance of the air conditioner may be enhanced.