Abstract: The present invention discloses a clogging detecting apparatus for a dryer which can check and display a clogging degree of an air passage. The clogging detecting apparatus for the dryer includes a judgment unit for judging the clogging degree of the air passage, a storing unit for storing the clogging degree of the air passage, and a display unit for displaying the clogging degree to the user. The clogging detecting apparatus for the dryer does not only notify clogging of the air passage but also provides information on the clogging degree, so that the user can precisely check the state of the air passage.

Abstract: The present invention discloses a clogging detecting system for a dryer which can display a clogging degree or state of an air passage to the user through a remote controlling device. The clogging detecting system for the dryer includes the dryer for judging the clogging degree of the air passage, and sending the clogging degree to a remote controlling device, and the remote controlling device for receiving the clogging degree from the dryer, and displaying the clogging degree through a display unit.

Abstract: A capacitor includes an upper electrode formed by physical vapor deposition and chemical vapor deposition. The upper electrode of the capacitor may include a first upper electrode formed by chemical vapor deposition and a second upper electrode formed by physical vapor deposition. Alternatively, the upper electrode may include a first upper electrode formed by physical vapor deposition and a second upper electrode formed by chemical vapor deposition. The upper electrode of the capacitor is formed through two steps using chemical vapor deposition and physical vapor deposition. Therefore, the upper electrode can be thick and rapidly formed, whereby electrical characteristics of the upper electrode are not deteriorated.

Abstract: A capacitor includes an upper electrode formed by physical vapor deposition and chemical vapor deposition. The upper electrode of the capacitor may include a first upper electrode formed by chemical vapor deposition and a second upper electrode formed by physical vapor deposition. Alternatively, the upper electrode may include a first upper electrode formed by physical vapor deposition and a second upper electrode formed by chemical vapor deposition. The upper electrode of the capacitor is formed through two steps using chemical vapor deposition and physical vapor deposition. Therefore, the upper electrode can be thick and rapidly formed, whereby electrical characteristics of the upper electrode are not deteriorated.

Abstract: A capacitor includes an upper electrode formed by physical vapor deposition and chemical vapor deposition. The upper electrode of the capacitor may include a first upper electrode formed by chemical vapor deposition and a second upper electrode formed by physical vapor deposition. Alternatively, the upper electrode may include a first upper electrode formed by physical vapor deposition and a second upper electrode formed by chemical vapor deposition. The upper electrode of the capacitor is formed through two steps using chemical vapor deposition and physical vapor deposition. Therefore, the upper electrode can be thick and rapidly formed, whereby electrical characteristics of the upper electrode are not deteriorated.

Abstract: A method form forming a dielectric film on a substrate includes the steps of placing the substrate in a process chamber wherein said substrate is isolated from an external environment, depositing the dielectric film on the substrate in the process chamber, and annealing the dielectric film in said process chamber. In particular, the dielectric film can be formed from Ta2O5. Systems for forming the dielectric film are also disclosed.

Abstract: A method form forming a dielectric film on a substrate includes the steps of placing the substrate in a process chamber wherein said substrate is isolated from an external environment, depositing the dielectric film on the substrate in the process chamber, and annealing the dielectric film in said process chamber. In particular, the dielectric film can be formed from Ta.sub.2 O.sub.5. Systems for forming the dielectric film are also disclosed.

Abstract: A method for manufacturing a semiconductor device including a combined stack-trench type capacitor is disclosed. The method comprises the steps of: forming a conductive layer serving as a first electrode of the capacitor both on the inside region of a trench and on a transistor and forming a planarizing layer on the conductive layer; forming a photoresist pattern on the planarizing layer; etching the planarizing layer and the conductive layer; and removing the planarizing layer. The sandwiched planarizing layer between the second conductive layer and the photoresist pattern prevents the exposing of the first electrode pattern during the photoetching, so that uncontaminated uniform dielectric film can be obtained.

Abstract: A highly integrated semiconductor memory device comprises a plurality of memory cells formed by alternately disposing a stack-type capacitor cell and a combined stack-trench type capacitor cell both in row and column directions. Each storage electrode of the capacitor of the memory cell is extended to overlap with the storage electrode of the capacitor of the adjacent memory cell. The combined stack-trench type capacitor is formed into the substrate to increase the storage capacitance thereof which allow the storage capacitance of the stack-type capacitor to increase by extending the storage electrode of the capacitor. Due to the alternate arrangement of stack-trench type capacitor and stack-type capacitor, step coverage, leakage current and soft errors of stack-trench type capacitor are prevented.

Abstract: A highly integrated semiconductor memory device comprises a plurality of memory cells formed by alternately disposing a stack-type capacitor cell and a combined stack-trench type capacitor cell both in row and column directions. Each storage electrode of the capacitor of the memory cell is extended to overlap with the storage electrode of the capacitor of the adjacent memory cell. The combined stack-trench type capacitor is formed into the substrate to increase the storage capacitance thereof which allow the storage capacitance of the stack-type capacitor to increase by extending the storage electrode of the capacitor. Due to the alternate arrangement of stack-trench type capacitor and stack-type capacitor, step coverage, leakage current and soft errors of stack-trench type capacitor are prevented.

Abstract: The method comprises the steps of: forming the transistor on a substrate and then depositing an interlayer insulating layer, and forming a design pattern of a first conductive layer by vertically etching it using a mask; horizontally overetching the pattern by using the etching process used for forming the pattern; depositing a first insulating film and then depositing the second conductive layer to the thickness needed to protect the first insulating film; vertically etching the second conductive layer, first insulating film and interlayer insulating layer by applying the mask used in vertically etching the first conductive layer; additionally depositing the second conductive layer; forming a design pattern of the second conductive layer by vertically etching it using a mask; horizontally overetching the pattern of the second conductive layer; depositing the second insulating film and then depositing a third conductive layer to have the thickness to protect the second insulating film; vertically etching the