Patents by Inventor Kyung-hwan Oh

Kyung-hwan Oh has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 10825394
    Abstract: A display device is described comprising sub-pixels that include: a first driving transistor and a second driving transistor, each of which control a current flowing from a first electrode to a second electrode in accordance with a data voltage applied to a gate electrode; a light emitting element connected to the second electrodes of the first driving transistor and the second driving transistor; and a first contact hole and a second contact hole which are disposed in the gate electrode, wherein the gate electrode includes a first gate electrode overlapping the first driving transistor in a thickness direction and a second gate electrode overlapping the second driving transistor in the thickness direction, and the first contact hole is located in the first gate electrode, the second contact hole is located in the second gate electrode, and the first contact hole and the second contact hole overlap each other.
    Type: Grant
    Filed: September 19, 2019
    Date of Patent: November 3, 2020
    Assignee: SAMSUNG DISPLAY CO., LTD.
    Inventors: Mi Hae Kim, Hyun Ji Kang, Kyung Hoon Kim, Jae Du Noh, Jeong Hun Bang, Kyong Hwan Oh
  • Publication number: 20200335460
    Abstract: A semiconductor package includes a semiconductor chip, an encapsulant, and an interconnection member. The semiconductor chip has connection pads. The encapsulant encapsulates a portion of the semiconductor chip. The interconnection member includes a first insulating layer disposed on the encapsulant and a portion of the semiconductor chip, a redistribution layer disposed on the first insulating layer, and a second insulating layer disposed on the first insulating layer and the redistribution layer. The redistribution layer is electrically connected to the connection pads of the semiconductor chip, and a thickness of the second insulating layer is greater than a thickness of the first insulating layer.
    Type: Application
    Filed: June 30, 2020
    Publication date: October 22, 2020
    Applicant: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: Doo Hwan LEE, Jong Rip Kim, Hyoung Joon Kim, Jin Yul Kim, Kyung Seob OH
  • Publication number: 20200330421
    Abstract: The present invention relates to a composition containing a monoacetyldiglyceride compound as an active ingredient, for inhibiting blood cancer or metastasis, and a use thereof. The monoacetyldiglyceride compound according to the present invention has excellent effects of inhibiting the expression of IL-4 and inhibiting the activity of STAT-6, and thereby is capable of overcoming side effects of currently used blood cancer or metastasis inhibiting agents. Also, the monoacetyldiglyceride compound is a non-toxic compound having superior therapeutic effects and thus can be useful as a composition for preventing, treating, or improving blood cancer and metastasis.
    Type: Application
    Filed: May 28, 2020
    Publication date: October 22, 2020
    Applicants: Enzychem Lifesciences Corporation, Korea Research Institute of Bio Science and Biotechnology
    Inventors: Jae Wha Kim, Sei-Ryang Oh, Kyung Seop Ahn, Ho Bum Kang, Jae Min Shin, Young Eun Ko, Tae Suk Lee, Myung Hwan Kim, Jong Koo Kang, Yong-Hae Han, Ki Young Sohn
  • Publication number: 20200302860
    Abstract: A display device is described comprising sub-pixels that include: a first driving transistor and a second driving transistor, each of which control a current flowing from a first electrode to a second electrode in accordance with a data voltage applied to a gate electrode; a light emitting element connected to the second electrodes of the first driving transistor and the second driving transistor; and a first contact hole and a second contact hole which are disposed in the gate electrode, wherein the gate electrode includes a first gate electrode overlapping the first driving transistor in a thickness direction and a second gate electrode overlapping the second driving transistor in the thickness direction, and the first contact hole is located in the first gate electrode, the second contact hole is located in the second gate electrode, and the first contact hole and the second contact hole overlap each other.
    Type: Application
    Filed: September 19, 2019
    Publication date: September 24, 2020
    Inventors: Mi Hae Kim, Hyun Ji Kang, Kyung Hoon Kim, Jae Du Noh, Jeong Hun Bang, Kyong Hwan Oh
  • Patent number: 10763541
    Abstract: Disclosed is a non-aqueous electrolyte for a lithium secondary battery and a lithium secondary battery comprising the same. The non-aqueous electrolyte including an ionizable lithium salt and an organic solvent may further include (a) 1 to 10 parts by weight of a compound having a vinylene group or vinyl group per 100 parts by weight of the non-aqueous electrolyte, and (b) 10 to 300 parts by weight of a dinitrile compound having an ether bond per 100 parts by weight of the compound having the vinylene group or vinyl group. The lithium secondary battery comprising the non-aqueous electrolyte may effectively suppress the swelling and improve the charge/discharge cycle life.
    Type: Grant
    Filed: February 12, 2013
    Date of Patent: September 1, 2020
    Assignee: LG Chem, Ltd.
    Inventors: Yeon-Suk Hong, Kwon-Young Choi, Jae-Seung Oh, Byoung-Bae Lee, Kyung-Hwan Jung, Hye-Yeong Sim
  • Patent number: 10748871
    Abstract: A semiconductor package may include a package substrate, a first semiconductor chip on the package substrate, and a second semiconductor chip on the first semiconductor chip. The first semiconductor chip comprises a chip substrate including a first surface and a second surface opposite to the first surface, a plurality of first chip pads between the package substrate and the chip substrate, and electrically connecting the first semiconductor chip to the package substrate, a plurality of second chip pads disposed on the second surface and between the second semiconductor chip and the second surface, and a plurality of redistribution lines on the second surface, the redistribution lines electrically connecting to the second semiconductor chip, and a plurality of bonding wires electrically connecting the redistribution lines to the package substrate.
    Type: Grant
    Filed: October 18, 2018
    Date of Patent: August 18, 2020
    Assignee: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: Seong Hwan Oh, Kyung Suk Oh, Kilsoo Kim
  • Patent number: 10714437
    Abstract: A fan-out semiconductor package includes: a first interconnection member having a through-hole; a semiconductor chip disposed in the through-hole and having an active surface having connection pads disposed thereon and an inactive surface opposing the active surface; an encapsulant encapsulating at least portions of the first interconnection member and the inactive surface of the semiconductor chip; a second interconnection member disposed on the first interconnection member and the active surface of the semiconductor chip; and a passivation layer disposed on the second interconnection member.
    Type: Grant
    Filed: February 26, 2018
    Date of Patent: July 14, 2020
    Assignee: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: Doo Hwan Lee, Jong Rip Kim, Hyoung Joon Kim, Jin Yul Kim, Kyung Seob Oh
  • Publication number: 20200215605
    Abstract: Provided is a roller assembly which includes: a supporter configured to rotatably support a roller disposed in a movement path of a to-be-treated material; a fixed shaft attached to a rear surface of the supporter and having at least a stretchable portion; a body attached to the rear surface side of the supporter so as to surround the fixed shaft; and a plunger attached so as to connect the body and the fixed shaft and formed so that at least a portion thereof advances and retreats with respect to the movement path, a casting device provided with the roller assembly, and a roller separating method, wherein the roller assembly is capable of separating the roller from the movement path during emergency.
    Type: Application
    Filed: August 8, 2018
    Publication date: July 9, 2020
    Inventors: Kyung Shik OH, Young Hoon KANG, Joo Dong LEE, Ki Hwan JOUNG
  • Publication number: 20200187775
    Abstract: An eye disease diagnosis method using artificial intelligence may include: collecting, from a database, a first eyeground image of a myopic patient who is not diagnosed with an eye disease and a second eyeground image of a myopic patient who has been diagnosed with the eye disease; learning eyeball change information by degree of myopia based on the first eyeground image, using deep learning; comparing and analyzing the first eyeground image and the second eyeground image based on the eyeball change information by the degree of myopia, and learning eyeball change information by the eye disease using deep learning; and estimating determination criteria of an eyeground image for diagnosis of the eye disease, based on a difference between the eyeball change information by the degree of myopia and the eyeball change information by the eye disease.
    Type: Application
    Filed: December 11, 2019
    Publication date: June 18, 2020
    Inventors: Sei Yeul OH, Kyung Ah PARK, Baek Hwan CHO
  • Patent number: 10686122
    Abstract: A variable resistance memory device includes a metal interconnection layer on a substrate, an interlayer insulating layer on the metal interconnection layer and defining a contact hole for exposing a portion of the metal interconnection layer, a barrier metal layer including a plurality of sub-barrier metal layers inside the contact hole, a plug metal layer on the barrier metal layer and burying the contact hole, and a variable resistance structure on the barrier metal layer and the plug metal layer.
    Type: Grant
    Filed: May 18, 2018
    Date of Patent: June 16, 2020
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Jung-hwan Park, Ju-hyun Kim, Se-chung Oh, Dong-kyu Lee, Jung-min Lee, Kyung-il Hong
  • Patent number: 10672978
    Abstract: In a method of manufacturing a variable resistance memory device, an MTJ structure layer is formed on a substrate. The MTJ structure layer is etched in an etching chamber to form an MTJ structure. The substrate having the MTJ structure thereon is transferred to a deposition chamber through a transfer chamber. A protection layer covering a sidewall of the MTJ structure is formed in the deposition chamber. The etching chamber, the transfer chamber, and the deposition chamber are kept in a high vacuum state equal to or more than about 10?8 Torr.
    Type: Grant
    Filed: September 5, 2018
    Date of Patent: June 2, 2020
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Jung-Min Lee, Ju-Hyun Kim, Jung-Hwan Park, Se-Chung Oh, Dong-Kyu Lee, Kyung-Il Hong
  • Patent number: 10622322
    Abstract: A fan-out semiconductor package includes a first connection member having a through-hole, a semiconductor chip disposed in the through-hole, the semiconductor chip having an active surface with connection pads disposed thereon and the semiconductor chip having an inactive surface opposing the active surface, an encapsulant, and a second connection member disposed on the first connection member and the active surface of the semiconductor chip, wherein the first connection member and the second connection member include redistribution layers electrically connected to the connection pads, wherein the semiconductor chip includes a first passivation layer disposed on the active surface and the semiconductor chip includes a second passivation layer disposed on the first passivation layer, and wherein the redistribution layer of the second connection member is directly formed on one surface of the second passivation layer and extends onto one surface of the first connection member.
    Type: Grant
    Filed: June 23, 2017
    Date of Patent: April 14, 2020
    Assignee: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: Hyoung Joon Kim, Doo Hwan Lee, Kyoung Moo Harr, Kyung Seob Oh
  • Patent number: 10600748
    Abstract: A fan-out semiconductor package includes: a first interconnection member having a through-hole; a semiconductor chip disposed in the through-hole and having an active surface having connection pads disposed thereon and an inactive surface opposing the active surface; an encapsulant encapsulating at least portions of the first interconnection member and the inactive surface of the semiconductor chip; a second interconnection member disposed on the first interconnection member and the active surface of the semiconductor chip; and a passivation layer disposed on the second interconnection member.
    Type: Grant
    Filed: December 13, 2016
    Date of Patent: March 24, 2020
    Assignee: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: Doo Hwan Lee, Jong Rip Kim, Hyoung Joon Kim, Jin Yul Kim, Kyung Seob Oh
  • Patent number: 10566289
    Abstract: A fan-out semiconductor package may include: a first connection member having a through hole; a semiconductor chip disposed in the through hole and having an active surface on which a connection pad is disposed and a non-active surface opposing the active surface; an encapsulant at least partially encapsulating the first connection member and the non-active surface of the semiconductor chip; and a second connection member disposed on the first connection member and the active surface of the semiconductor chip and including a redistribution layer electrically connected to the connection pad, wherein the first connection member includes a first insulating layer, a first redistribution layer embedded in the first insulating layer while contacting the second connection member, and a second redistribution layer disposed on the other side of the first insulating layer opposing one side thereof in which the first redistribution layer is embedded.
    Type: Grant
    Filed: October 5, 2016
    Date of Patent: February 18, 2020
    Assignee: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: Doo Hwan Lee, Kyung Seob Oh, Jong Rip Kim, Hyoung Joon Kim
  • Publication number: 20200027818
    Abstract: Disclosed is a semiconductor package comprising a package substrate, a first semiconductor chip on the package substrate and including a first region and a second region, a second semiconductor chip on the first region, a heat radiation spacer on the second region, a third semiconductor chip supported by the second semiconductor chip and the heat radiation spacer, and a molding layer covering the first to third semiconductor chips and the heat radiation spacer.
    Type: Application
    Filed: February 26, 2019
    Publication date: January 23, 2020
    Applicant: Samsung Electronics Co., Ltd.
    Inventors: Hyunki Kim, Sangsoo Kim, Seung Hwan Kim, Kyung Suk Oh, Yongkwan Lee, Jongho Lee
  • Publication number: 20190392291
    Abstract: Provided is an electronic circuit for implementing a generative adversarial neural network. The electronic circuit includes a spike converter, a spike image generator, a spike image converter, and an image discriminator. The spike converter generates a first signal including spike signals. The number of the spike signals is determined based on first data associated with second data within a reference time interval. The spike image generator generates a second signal including spike signals being selected based on a weight among the spike signals of the first signal. The image converter converts the spike signals of the second signal to generate third data being represented in an analog domain. The image discriminator provides the spike image generator with result data being associated with a difference between a value of the third data and a value of the second data. The image generator determines the weight based on the result data.
    Type: Application
    Filed: June 19, 2019
    Publication date: December 26, 2019
    Applicant: Electronics and Telecommunications Research Institute
    Inventors: Seong Mo PARK, Jae-Jin LEE, Sung Eun KIM, Kyung Hwan PARK, Mi Jeong PARK, Young Hwan BAE, Kwang IL OH, Byounggun CHOI
  • Publication number: 20190353178
    Abstract: The present disclosure provides an oil pump including a housing in which a space is formed, a rotor installed to be rotatable in an eccentric position in the housing and having vanes mounted along a circumference direction to be protruded and retracted in a radial direction of the housing, and an inner ring fitted to an inner surface of the housing and rotated along with the rotor when the rotor rotates. The housing is formed of a material harder than the material of the inner ring, and oil for lubrication is provided between the housing and the inner ring.
    Type: Application
    Filed: March 15, 2019
    Publication date: November 21, 2019
    Inventors: Jae-Kyun DOO, Kyung-Hwan OH, Hyun-Eu JUNG
  • Publication number: 20190324854
    Abstract: A memory device includes: a first memory bank and a second memory bank; a control logic configured to receive a command and control an internal operation of the memory device; and an error correction code (ECC) circuit configured to retain in a latch circuit first read data read from the first memory bank in response to a first masked write (MWR) command for the first memory bank based on a latch control signal from the control logic, generate a first parity from data in which the first read data retained in the latch circuit is merged with first write data corresponding to the first MWR command in response to a first write control signal received from the control logic, and control an ECC operation to retain in the latch circuit second read data read from the second memory bank based on the latch control signal.
    Type: Application
    Filed: April 19, 2019
    Publication date: October 24, 2019
    Inventors: Jung-hwan Park, Tae-young Oh, Hyung-joon Chi, Kyung-soo Ha, Hyong-ryol Hwang
  • Publication number: 20190295986
    Abstract: A semiconductor package may include a package substrate, a first semiconductor chip on the package substrate, and a second semiconductor chip on the first semiconductor chip. The first semiconductor chip comprises a chip substrate including a first surface and a second surface opposite to the first surface, a plurality of first chip pads between the package substrate and the chip substrate, and electrically connecting the first semiconductor chip to the package substrate, a plurality of second chip pads disposed on the second surface and between the second semiconductor chip and the second surface, and a plurality of redistribution lines on the second surface, the redistribution lines electrically connecting to the second semiconductor chip, and a plurality of bonding wires electrically connecting the redistribution lines to the package substrate.
    Type: Application
    Filed: October 18, 2018
    Publication date: September 26, 2019
    Inventors: SEONG HWAN OH, Kyung Suk OH, KILSOO KIM
  • Publication number: 20190237127
    Abstract: A memory device includes a clock receiver configured to receive, from a memory controller, a write clock that is used to receive write data during a data write operation, a duty monitor configured to generate first monitoring information by monitoring a duty of the write clock, and a duty adjuster configured to adjust the duty of the write clock in response to a duty control signal and output an adjusted write clock. The memory device provides the first monitoring information to the memory controller, and receives the duty control signal, generated using the first monitoring information, from the memory controller.
    Type: Application
    Filed: December 21, 2018
    Publication date: August 1, 2019
    Inventors: DAE-SIK MOON, Gil-Hoon Cha, Ki-Seok Oh, Chang-Kyo Lee, Yeon-Kyu Choi, Jung-Hwan Choi, Kyung-Soo Ha, Seok-Hun Hyun