Abstract: A slurry composition useful for chemical mechanical polishing of the surface of a material layer, e.g., a silicon oxide layer, is disclosed. A first material surface which is exposed to the slurry exhibits hydrophilicity, while a second material layer, e.g., a polysilicon layer, the surface of which is also exposed to the slurry, exhibits hydrophobicity, and accordingly acts as a polishing stopping layer. The slurry composition consists essentially of water, abrasive grains, and a polymer additive having both hydrophilic and hydrophobic functional groups.

Abstract: Provided is a semiconductor device including a vertically oriented capacitor extending above the substrate surface and a method of manufacturing such devices in which cell, peripheral and boundary areas between the cell and peripheral areas are defined on a semiconductor substrate. Capacitors are formed in the cell area, a mold pattern is provided in the peripheral areas and an elongated dummy pattern is provided in the boundary areas. The dummy pattern includes a boundary opening in which a thin layer is formed on the elongated inner sidewalls and on the exposed portion of the substrate during formation of the lower electrode. A mold pattern and lower electrode structures having substantially the same height are then formed area so that subsequent insulation interlayer(s) exhibit a generally planar surface, i.e., have no significant step difference between the cell areas and the peripheral areas.

Abstract: Example embodiments of the present invention relate to an electrode structure, a method of manufacturing the electrode structure, a phase-change memory device having the electrode structure and a method of manufacturing the phase-change memory device. The electrode structure may include a pad, a first insulation layer pattern, a second insulation layer pattern and/or an electrode. The first insulation layer pattern may be formed on the pad. The first insulation layer pattern may have a first opening that partially exposes the pad. The second insulation layer pattern may be formed on the first insulation layer pattern. The second insulation layer pattern may have a second opening connected to the first opening. The electrode may be formed on the pad and filling the first and the second openings.

Abstract: A semiconductor structure may be formed by a wet etching process using an etchant containing water. The semiconductor structure may include a plurality of patterns having an increased or higher aspect ratio and may be arranged closer to one another. A dry cleaning process may be performed using hydrogen fluoride gas on the semiconductor structure.

Abstract: In a phase-change semiconductor device and methods of manufacturing the same, an example method may include forming a metal layer pattern on a substrate, the metal layer pattern including an opening that exposes a portion of the substrate, forming an etch stop layer on the metal layer pattern, a sidewall of the opening and the exposed portion of the substrate, the etch stop layer formed with a thickness less than an upper thickness threshold, and reducing at least a portion of the etch stop layer, the reduced portion of the etch stop layer forming an electrical connection with the substrate.

Abstract: Example embodiments of the present invention relate to an etching solution, a method of forming a pattern using the same, a method of manufacturing a multiple gate oxide layer using the same and a method of manufacturing a flash memory device using the same. Other example embodiments of the present invention relate to an etching solution having an etching selectivity between a polysilicon layer and an oxide layer, a method of forming a pattern using an etching solution using the same, a method of manufacturing a multiple gate oxide layer using the same, and a method of manufacturing a flash memory device using the same. An etching solution including hydrogen peroxide (H2O2) and ammonium hydroxide (NH4OH) by a volume ratio of about 1:2 to about 1:10 mixed in water. In a method of forming a pattern and methods of manufacturing a multiple gate oxide layer and a flash memory device, a polysilicon layer may be formed on a substrate.

Abstract: A platen structure of a polishing apparatus for semiconductor wafer and a method for exchanging a polishing pad affixed to the same are provided in which the polishing pad supported by the platen is exchanged with convenience within a short time. The platen structure of the polishing apparatus in which the polishing pad attached to the platen of the polishing apparatus comprises a pad plate to which the polishing pad for polishing a wafer is attached, and a platen body combined with the pad plate and having at least one vacuum hole formed thereto to provide a vacuum passage.

Abstract: In a method of processing a semiconductor structure and a method of forming a capacitor for a semiconductor device using the same, a semiconductor structure may be cleaned using a cleaning solution having a surface tension lower than that of water. The semiconductor structure may be dried in an isopropyl alcohol vapor atmosphere.

Abstract: Methods of manufacturing a semiconductor device are provided. A trench is formed in a semiconductor substrate. A first field oxide layer is formed that partially fills the trench. The first field oxide layer defines an active region of the substrate that is adjacent to the trench. An upper portion of sidewalls of the trench extends upward beyond a surface of the first field oxide layer. A first liner is formed on the first field oxide layer and on the portion of the sidewalls of the trench that extend upward beyond the first field oxide layer. A second field oxide layer is formed on the first liner and fills the trench. The second field oxide layer and the first liner are each partially removed to expose a top adjacent surface and upper sidewalls of the trench along the active region of the substrate. A dielectric layer is formed on the exposed top adjacent surface and upper sidewalls of the trench. A gate electrode is formed on the dielectric layer.

Abstract: For planarizing an IC (integrate circuit) material, a first slurry is dispensed for a first planarization of the IC material using the first slurry, and a second slurry is dispensed for a second planarization of the IC material using the second slurry. The first and second slurries are different. For example, the first slurry is silica based for faster planarization during the first planarization. Thereafter, the second planarization is performed with the second slurry that is ceria based with higher planarity for attaining sufficient planarization of the IC material.

Abstract: In a method of manufacturing a semiconductor device having a stacked structure, an amorphous silicon layer may be formed on a first single crystalline silicon layer. An amorphous state of the amorphous silicon layer may be converted into a single crystalline state to form a preliminary second single crystalline silicon layer having protrusions. The protrusions may be polished to form a second single crystalline silicon layer.

Abstract: A semiconductor device and a method thereof are disclosed. In the example method, a mold layer having an opening may be formed on a substrate. A conductive etchable pattern (e.g., a preliminary conductive pattern, a lower electrode pattern, etc.) may be formed within the opening. The mold layer may be reduced so as to expose a portion of the conductive etchable pattern and less than all of the exposed portion of the conductive etchable pattern may be etched such that the etched conductive etchable pattern has a reduced thickness. The example semiconductor device may include the etched conductive etchable pattern as above-described with respect to the example method.

Abstract: Disclosed is an organic stripping composition and a method of etching a semiconductor device in which the generation of an Si pitting phenomenon can be prevented. The composition includes a compound including a hydroxyl ion (OH?), a compound including a fluorine ion (F?) and a sufficient amount of an oxidizing agent to control the pH of the composition within the range of from about 6.5 to about 8.0. The method includes dry etching an oxide by a dry etching using a plasma, and then ashing the etched oxide using an ashing process to remove an organic material. The method further includes supplying the organic stripping composition to remove residues including any residual organic material, a metal polymer, and an oxide type polymer. The stripping composition is stable onto various metals and does not induce the Si pitting phenomenon.

Abstract: A method of forming an epitaxial contact plug in a semiconductor device comprises forming an insulating interlayer on a semiconductor substrate, forming a mushroom-shaped epitaxial plug in an opening of the insulating interlayer, forming a buffer layer on the epitaxial plug and the insulating interlayer, and planarizing epitaxial plug and the insulating interlayer using a chemical mechanical polishing (CMP) process.

Abstract: In a slurry composition preventing damage to an insulation layer, and uniformly polishing a metal layer, the slurry composition includes an acidic aqueous solution having a first pH and an anionic surfactant having a second pH lower than or equal to the first pH. Irregular polishing of the metal layer relative to a pattern density may be prevented and a contact having a uniform thickness may be formed using the slurry composition.

Abstract: The apparatus for cleaning a wafer includes an energy concentration relieving member positioned at the side of the wafer. An elongated portion of a probe extends over and substantially parallel to the wafer surface. A vibrator is attached to a rear end of the probe for vibrating the probe such that the elongated portion transfers acoustic vibrational energy to the wafer and dislodges debris.

Abstract: In an embodiment, a chemical mechanical polishing method for a substrate having a first layer and a stepped portion. A surface of the first layer is positioned above an upper face of the stepped portion. A polishing process for selectively removing the stepped portion is performed on the first layer by using a first slurry composition that has a self-stopping characteristic so that the first layer is changed into a second layer having a substantially flat surface. A second polishing process is performed using a second slurry composition that does not have the self-stopping characteristic, until the upper face of the stepped portion is exposed.

Abstract: A method of forming a capacitor can include forming a protective layer on a metal layer in a trench in an insulating layer and outside thereof. A surface of the protective layer and the metal layer beneath can be planarized using a chemical mechanical polishing (CMP) process to expose a surface of the insulating layer outside the trench. Related structures are also disclosed.

Abstract: A platen structure of a polishing apparatus for semiconductor wafer and a method for exchanging a polishing pad affixed to the same are provided in which the polishing pad supported by the platen is exchanged with convenience within a short time. The platen structure of the polishing apparatus in which the polishing pad attached to the platen of the polishing apparatus comprises a pad plate to which the polishing pad for polishing a wafer is attached, and a platen body combined with the pad plate and having at least one vacuum hole formed thereto to provide a vacuum passage.

Abstract: A cleaning apparatus includes upper and lower nozzle assemblies supplying a cleaning liquid to edge and bottom sections of a semiconductor substrate. The upper nozzle assembly has a first nozzle supplying the cleaning liquid onto the edge section, and second and third nozzles supplying a nitrogen gas for preventing the cleaning liquid from moving into a center portion of the semiconductor substrate. The cleaning liquid supplied to the edge section flows from the edge section towards a side section of the semiconductor substrate due to the rotation of the semiconductor substrate. An ultrasonic wave generator is provided above the edge section for generating ultrasonic waves. The ultrasonic waves are applied to the cleaning liquid supplied onto the edge and bottom sections, thereby improving the cleaning efficiency. The cleaning apparatus has a guide to guide the cleaning liquid supplied to the edge section toward the side section.