Patents by Inventor Kyung Kyu MIN

Kyung Kyu MIN has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 9589960
    Abstract: A method for forming a semiconductor structure includes forming a trench in a semiconductor substrate; forming a first dielectric layer over a bottom surface and sidewalls of the trench; forming a second dielectric layer over the first dielectric layer; forming a sacrificial layer that fills the trench, over the second dielectric layer; etching the sacrificial layer and the second dielectric layer, and forming a sacrificial filler and a dielectric liner that are positioned in the trench; removing the sacrificial filler; forming a conductive layer that fills the trench, over the dielectric liner and the first dielectric layer; and etching the conductive layer to be buried in the trench.
    Type: Grant
    Filed: June 30, 2016
    Date of Patent: March 7, 2017
    Assignee: SK Hynix Inc.
    Inventor: Kyung-Kyu Min
  • Patent number: 9558990
    Abstract: A semiconductor device and a method for forming the same can block a moving path of electrons between neighbor buried gates. A semiconductor device includes a device isolation film formed to define an active region over a semiconductor substrate. The semiconductor device also includes a plurality of buried gates formed over the active region, and a barrier film formed between neighboring buried gates from the plurality of buried gates.
    Type: Grant
    Filed: September 24, 2015
    Date of Patent: January 31, 2017
    Assignee: SK HYNIX INC.
    Inventor: Kyung Kyu Min
  • Patent number: 9455329
    Abstract: A junctionless semiconductor device having a buried gate, a module and system each having the same, and a method for forming the semiconductor device are disclosed. A source, a drain, and a body of a semiconductor device having a buried gate are doped with the same type of impurities, so that the junctionless semiconductor device does not include a PN junction between the source and the body or between the body and the drain. As a result, a leakage current caused by GIDL is reduced so that operation characteristics of the semiconductor device are improved and the size of a current-flowing region is increased, resulting in an increased operation current.
    Type: Grant
    Filed: November 25, 2014
    Date of Patent: September 27, 2016
    Assignee: SK HYNIX INC.
    Inventors: Kyung Kyu Min, Min Soo Yoo, Il Woong Kwon
  • Publication number: 20160013094
    Abstract: A semiconductor device and a method for forming the same can block a moving path of electrons between neighbor buried gates. A semiconductor device includes a device isolation film formed to define an active region over a semiconductor substrate. The semiconductor device also includes a plurality of buried gates formed over the active region, and a barrier film formed between neighboring buried gates from the plurality of buried gates.
    Type: Application
    Filed: September 24, 2015
    Publication date: January 14, 2016
    Inventor: Kyung Kyu MIN
  • Patent number: 9177851
    Abstract: A semiconductor device and a method for forming the same can block a moving path of electrons between neighbor buried gates. A semiconductor device includes a device isolation film formed to define an active region over a semiconductor substrate. The semiconductor device also includes a plurality of buried gates formed over the active region, and a barrier film formed between neighboring buried gates from the plurality of buried gates.
    Type: Grant
    Filed: December 13, 2013
    Date of Patent: November 3, 2015
    Assignee: SK HYNIX INC.
    Inventor: Kyung Kyu Min
  • Publication number: 20150079737
    Abstract: A junctionless semiconductor device having a buried gate, a module and system each having the same, and a method for forming the semiconductor device are disclosed. A source, a drain, and a body of a semiconductor device having a buried gate are doped with the same type of impurities, so that the junctionless semiconductor device does not include a PN junction between the source and the body or between the body and the drain. As a result, a leakage current caused by GIDL is reduced so that operation characteristics of the semiconductor device are improved and the size of a current-flowing region is increased, resulting in an increased operation current.
    Type: Application
    Filed: November 25, 2014
    Publication date: March 19, 2015
    Inventors: Kyung Kyu MIN, Min Soo YOO, Il Woong KWON
  • Patent number: 8923035
    Abstract: A junctionless semiconductor device having a buried gate, a module and system each having the same, and a method for forming the semiconductor device are disclosed. A source, a drain, and a body of a semiconductor device having a buried gate are doped with the same type of impurities, so that the junctionless semiconductor device does not include a PN junction between the source and the body or between the body and the drain. As a result, a leakage current caused by GIDL is reduced so that operation characteristics of the semiconductor device are improved and the size of a current-flowing region is increased, resulting in an increased operation current.
    Type: Grant
    Filed: December 20, 2012
    Date of Patent: December 30, 2014
    Assignee: SK Hynix Inc.
    Inventors: Kyung Kyu Min, Min Soo Yoo, Il Woong Kwon
  • Publication number: 20140367775
    Abstract: A semiconductor device and a method for forming the same can block a moving path of electrons between neighbor buried gates. A semiconductor device includes a device isolation film formed to define an active region over a semiconductor substrate. The semiconductor device also includes a plurality of buried gates formed over the active region, and a barrier film formed between neighboring buried gates from the plurality of buried gates.
    Type: Application
    Filed: December 13, 2013
    Publication date: December 18, 2014
    Applicant: SK HYNIX INC.
    Inventor: Kyung Kyu MIN
  • Publication number: 20140064006
    Abstract: A junctionless semiconductor device having a buried gate, a module and system each having the same, and a method for forming the semiconductor device are disclosed. A source, a drain, and a body of a semiconductor device having a buried gate are doped with the same type of impurities, so that the junctionless semiconductor device does not include a PN junction between the source and the body or between the body and the drain. As a result, a leakage current caused by GIDL is reduced so that operation characteristics of the semiconductor device are improved and the size of a current-flowing region is increased, resulting in an increased operation current.
    Type: Application
    Filed: December 20, 2012
    Publication date: March 6, 2014
    Applicant: SK hynix Inc.
    Inventors: Kyung Kyu MIN, Min Soo YOO, Il Woong KWON