Patents by Inventor Kyung Mun

Kyung Mun has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 8697583
    Abstract: Provided according to embodiments of the present invention are an oxidation-promoting compositions, methods of forming oxide layers, and methods of fabricating semiconductor devices. In some embodiments of the invention, the oxidation-promoting composition includes an oxidation-promoting agent having a structure of A-M-L, wherein L is a functional group that is chemisorbed to a surface of silicon, silicon oxide, silicon nitride, or metal, A is a thermally decomposable oxidizing functional group, and M is a moiety that allows A and L to be covalently bonded to each other.
    Type: Grant
    Filed: September 2, 2011
    Date of Patent: April 15, 2014
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Kyung-seok Oh, Kyung-mun Byun, Shin-hye Kim, Deok-young Jung, Gil-heyun Choi, Eunkee Hong
  • Patent number: 8624354
    Abstract: A semiconductor device may include a semiconductor substrate and a plurality of three-dimensional capacitors on the semiconductor substrate. Each of the plurality of three-dimensional capacitors may include a first three-dimensional electrode, a capacitor dielectric layer, and a second three-dimensional electrode with the first three-dimensional electrode between the capacitor dielectric layer and the semiconductor substrate and with the capacitor dielectric layer between the first and second three-dimensional electrodes. A plurality of capacitor support pads may be provided with each capacitor support pad being arranged between adjacent first three-dimensional electrodes of adjacent three-dimensional capacitors with portions of the capacitor dielectric layers between the capacitor support pads and the semiconductor substrate. Related methods and apparatuses are also discussed.
    Type: Grant
    Filed: July 2, 2010
    Date of Patent: January 7, 2014
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Shin-hye Kim, Kyung-mun Byun, Hong-rae Kim, Gil-heyun Choi, Eun-kee Hong
  • Publication number: 20120058647
    Abstract: Provided according to embodiments of the present invention are an oxidation-promoting compositions, methods of forming oxide layers, and methods of fabricating semiconductor devices. In some embodiments of the invention, the oxidation-promoting composition includes an oxidation-promoting agent having a structure of A-M-L, wherein L is a functional group that is chemisorbed to a surface of silicon, silicon oxide, silicon nitride, or metal, A is a thermally decomposable oxidizing functional group, and M is a moiety that allows A and L to be covalently bonded to each other.
    Type: Application
    Filed: September 2, 2011
    Publication date: March 8, 2012
    Inventors: Kyung-seok Oh, Kyung-mun Byun, Shin-hye Kim, Deok-young Jung, Gil-heyun Choi, Eunkee Hong
  • Publication number: 20110303545
    Abstract: A method for treating a surface of a magnesium-based metal is disclosed for realizing a metallic texture of the magnesium-based metal. The method includes a buffing step of chemically polishing a surface of a magnesium-based metal by using a chemical polishing agent containing sodium nitride and sodium citrate; an immersing step of immersing the magnesium-based metal, which has been subject to the buffing step, into a strongly alkaline electrolyte solution of pH 11 or above; and an anodizing treatment step of forming a transparent anodizing film on the surface of the magnesium-based metal by applying current with a current density of 0.01 to 1 A/dm2 to the magnesium-based metal in the strongly alkaline electrolyte solution.
    Type: Application
    Filed: July 20, 2010
    Publication date: December 15, 2011
    Applicant: NUC ELECTRONICS CO., LTD.
    Inventors: Jong Boo Kim, Kyung Mun Lee, Soo Young Doh
  • Publication number: 20110115051
    Abstract: A semiconductor device may include a semiconductor substrate and a plurality of three-dimensional capacitors on the semiconductor substrate. Each of the plurality of three-dimensional capacitors may include a first three-dimensional electrode, a capacitor dielectric layer, and a second three-dimensional electrode with the first three-dimensional electrode between the capacitor dielectric layer and the semiconductor substrate and with the capacitor dielectric layer between the first and second three-dimensional electrodes. A plurality of capacitor support pads may be provided with each capacitor support pad being arranged between adjacent first three-dimensional electrodes of adjacent three-dimensional capacitors with portions of the capacitor dielectric layers between the capacitor support pads and the semiconductor substrate. Related methods and apparatuses are also discussed.
    Type: Application
    Filed: July 2, 2010
    Publication date: May 19, 2011
    Inventors: Shin-hye Kim, Kyung-mun Byun, Hong-rae Kim, Gil-heyun Choi, Eun-kee Hong
  • Patent number: 7858492
    Abstract: A method of filling a trench in a substrate ensures that a void or seam is not left in the material occupying the trench. First, a preliminary insulating layer is formed so as to extend contiguously along the bottom and sides of the trench and along an upper surface of the substrate. Impurities are then implanted into a portion of the preliminary insulating layer adjacent the top of the first trench to form a first insulating layer having a doped region and an undoped region. The doped region is removed to form a first insulating layer pattern at the bottom and sides of the first trench, and which first insulating layer pattern defines a second trench. The second trench is then filled with insulating material.
    Type: Grant
    Filed: December 19, 2008
    Date of Patent: December 28, 2010
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Eunkee Hong, Kyung-Mun Byun, Jong-Wan Choi, Eun-Kyung Baek, Young-Sun Kim
  • Publication number: 20100240194
    Abstract: A method of fabricating a semiconductor device, the method including sequentially forming a pad oxide layer and a nitride layer on a substrate; etching the nitride layer, the pad oxide layer, and the substrate to form a trench; forming a sidewall oxide layer on a sidewall and a bottom of the trench; forming a oxide layer liner including nitrogen on the sidewall oxide layer; and forming a gap fill layer on the oxide layer liner
    Type: Application
    Filed: March 23, 2010
    Publication date: September 23, 2010
    Inventors: DeokYoung Jung, Ju-Seon Goo, Kyung-Mun Byun, Eunkee Hong, Jun-Won Lee
  • Patent number: 7781304
    Abstract: A semiconductor device having a trench isolation region and methods of fabricating the same are provided. The method includes forming a first trench region in a substrate, and a second trench region having a larger width than the first trench region in the substrate. A lower material layer may fill the first and second trench regions. The lower material layer may be etched by a first etching process to form a first preliminary lower material layer pattern remaining in the first trench region and form a second preliminary lower material layer pattern that remains in the second trench region. An upper surface of the second preliminary lower material layer pattern may be at a different height than the first preliminary lower material layer pattern. The first and second preliminary lower material layer patterns may be etched by a second etching process to form first and second lower material layer patterns having top surfaces at substantially the same height.
    Type: Grant
    Filed: July 11, 2008
    Date of Patent: August 24, 2010
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Kyung-Mun Byun, Ju-Seon Goo, Sang-Ho Rha, Eun-Kyung Baek, Jong-Wan Choi
  • Publication number: 20090191687
    Abstract: A method of filling a trench in a substrate ensures that a void or seam is not left in the material occupying the trench. First, a preliminary insulating layer is formed so as to extend contiguously along the bottom and sides of the trench and along an upper surface of the substrate. Impurities are then implanted into a portion of the preliminary insulating layer adjacent the top of the first trench to form a first insulating layer having a doped region and an undoped region. The doped region is removed to form a first insulating layer pattern at the bottom and sides of the first trench, and which first insulating layer pattern defines a second trench. The second trench is then filled with insulating material.
    Type: Application
    Filed: December 19, 2008
    Publication date: July 30, 2009
    Applicant: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: Eunkee Hong, Kyung-Mun Byun, Jong-Wan Choi, Eun-Kyung Baek, Young-Sun Kim
  • Publication number: 20090045483
    Abstract: A semiconductor device may include a semiconductor substrate, trench region, buffer pattern, gap fill layer, and transistor. The trench region may be provided in the semiconductor substrate to define an active region. The buffer pattern and gap fill layer may be provided in the trench region. The buffer pattern and gap fill layer may fill the trench region. The gap fill layer may be densified by the buffer pattern. The transistor may be provided in the active region. A method of manufacturing a semiconductor device may include: forming a trench region in a semiconductor substrate; forming a buffer layer on an inner wall of the first trench region; forming a gap fill layer, filling the trench region; performing a thermal process to react the impurity with the oxygen, forming a buffer pattern; and forming a transistor in the active region.
    Type: Application
    Filed: August 13, 2008
    Publication date: February 19, 2009
    Inventors: Sang-Ho Rha, Eun-Kee Hong, Kyung-Mun Byun, Jong-Wan Choi, Eun-Kyung Baek
  • Publication number: 20090031761
    Abstract: A suspension apparatus for a washing machine comprises: a pivot mounted to a casing; a damper cap mounted to an outer tub installed in the casing; a connection rod having the pivot and the damper cap at both ends thereof; and an elastic means formed in the damper cap, wherein a contact area decreasing portion for reducing a contact area on the surface of the pivot is formed on the pivot. Under this configuration, vibration or noise transmitted to a mounting surface for the pivot is reduced.
    Type: Application
    Filed: July 28, 2008
    Publication date: February 5, 2009
    Inventors: Young-Jong KIM, Kyung-Mun Jong
  • Publication number: 20090020847
    Abstract: A semiconductor device having a trench isolation region and methods of fabricating the same are provided. The method includes forming a first trench region in a substrate, and a second trench region having a larger width than the first trench region in the substrate. A lower material layer may fill the first and second trench regions. The lower material layer may be etched by a first etching process to form a first preliminary lower material layer pattern remaining in the first trench region and form a second preliminary lower material layer pattern that remains in the second trench region. An upper surface of the second preliminary lower material layer pattern may be at a different height than the first preliminary lower material layer pattern. The first and second preliminary lower material layer patterns may be etched by a second etching process to form first and second lower material layer patterns having top surfaces at substantially the same height.
    Type: Application
    Filed: July 11, 2008
    Publication date: January 22, 2009
    Inventors: Kyung-Mun Byun, Ju-Seon Goo, Sang-Ho Rha, Eun-Kyung Baek, Jong-Wan Choi
  • Publication number: 20080196266
    Abstract: A ductless dryer includes a main body, a drum rotatably installed at the main body, a heat exchanger for removing moisture from air exhausted from the drum, a circulation duct to flow the air exhausted from the drum into the heat exchanger, an exhaust duct to flow the air exhausted from the heat exchanger outside the dryer; and a noise reduction portion to attenuate noise propagation through the exhaust duct. As the ductless dryer is provided with the noise reduction portion, the noise propagation through the exhaust duct exposed into the room and the noise of the entire ductless dryer can be attenuated at the same time, whereby a quieter room environment can be provided.
    Type: Application
    Filed: February 19, 2008
    Publication date: August 21, 2008
    Inventors: Han-Yong Jung, Seung-Phyo Ahn, Sang-Ik Lee, Kyung-Mun Jung, Yoon-Seob Eom, Yang-Ho Kim, Jea-Hyuk Wee, Byeong-Jo Ryoo, Sung-Ho Song