Abstract: A method of operating a storage device includes receiving, from a host, a first packet containing a buffer address indicating a location of a data buffer selected from among a plurality of data buffers in the host, parsing the buffer address from the first packet, and transmitting a second packet containing the buffer address to the host in response to the first packet.

Abstract: A method of operating a storage device includes receiving, from a host, a first packet containing a buffer address indicating a location of a data buffer selected from among a plurality of data buffers in the host, parsing the buffer address from the first packet, and transmitting a second packet containing the buffer address to the host in response to the first packet.

Abstract: A storage system is provided. The storage system includes a storage device including a plurality of nonvolatile memories configured to transmit storage throughput information, and a host device configured to change connection configurations for the storage device based on the storage throughput information, wherein the host device changes the connection configurations by changing configurations for transmitter and receiver paths between the storage device and the host device independently.

Abstract: A method of operating a storage device includes receiving, from a host, a first packet containing a buffer address indicating a location of a data buffer selected from among a plurality of data buffers in the host, parsing the buffer address from the first packet, and transmitting a second packet containing the buffer address to the host in response to the first packet.

Abstract: A storage system is provided. The storage system includes a storage device including a plurality of nonvolatile memories configured to transmit storage throughput information, and a host device configured to change connection configurations for the storage device based on the storage throughput information, wherein the host device changes the connection configurations by changing configurations for transmitter and receiver paths between the storage device and the host device independently.

Abstract: A method of operating a storage device includes receiving, from a host, a first packet containing a buffer address indicating a location of a data buffer selected from among a plurality of data buffers in the host, parsing the buffer address from the first packet, and transmitting a second packet containing the buffer address to the host in response to the first packet.

Abstract: A method of operating a storage device includes receiving, from a host, a first packet containing a buffer address indicating a location of a data buffer selected from among a plurality of data buffers in the host, parsing the buffer address from the first packet, and transmitting a second packet containing the buffer address to the host in response to the first packet.

Abstract: Provided are a storage device, a storage system, and a method of operating the same. A storage device communicably connected to a host may include a non-volatile memory configured to store at least one piece of boot data necessary for booting the storage device; and a device controller configured to receive an interface initialize command (IFIC) from the host, predict requested boot data requested by the host from among the at least one piece of boot data based on the IFIC, and control the non-volatile memory to read the requested boot data.

Abstract: A method of operating a storage device includes receiving, from a host, a first packet containing a buffer address indicating a location of a data buffer selected from among a plurality of data buffers in the host, parsing the buffer address from the first packet, and transmitting a second packet containing the buffer address to the host in response to the first packet.

Abstract: A method of operating a storage device includes receiving, from a host, a first packet containing a buffer address indicating a location of a data buffer selected from among a plurality of data buffers in the host, parsing the buffer address from the first packet, and transmitting a second packet containing the buffer address to the host in response to the first packet.

Abstract: A method of operating a storage device includes receiving, from a host, a first packet containing a buffer address indicating a location of a data buffer selected from among a plurality of data buffers in the host, parsing the buffer address from the first packet, and transmitting a second packet containing the buffer address to the host in response to the first packet.

Abstract: Provided are a storage device, a storage system, and a method of operating the same. A storage device communicably connected to a host may include a non-volatile memory configured to store at least one piece of boot data necessary for booting the storage device; and a device controller configured to receive an interface initialize command (IFIC) from the host, predict requested boot data requested by the host from among the at least one piece of boot data based on the IFIC, and control the non-volatile memory to read the requested boot data.

Abstract: A memory swapping method and a data processing system using the same, the memory swapping method including receiving queue information for a memory swapping task from a host device; performing part of the memory swapping task in a storage device based on the queue information; receiving a command corresponding to the queue information from the host device after performing of the part of the memory swapping task is completed; and performing a remaining part of the memory swapping task according to the command by using a result of the part of the memory swapping task that had been previously performed.

Abstract: An embedded multimedia card (eMMC) includes a flash memory and an eMMC controller that controls operation of the flash memory. The eMMC controller includes a command register that receives from a host a command set defining a next operation specifying second data simultaneously with a transfer of first data specified by a current operation, a first memory that stores the first data, and a second memory that stores the second data.

Abstract: An embedded multimedia card (eMMC) is provided. The eMMC includes a clock channel receiving a clock output from a host, data channels receiving data signals from the host, and a command channel receiving a SWITCH command including delay offset values from the host so as to adjust a delay of at least one of the data signals, which are received, in response to the delay offset values.

Abstract: An embedded multimedia card (eMMC) and a method of operating the same are provided. The eMMC includes a flash memory and a device controller configured to control the flash memory. The device controller includes a command storage unit configured to receive a command transmitted from a host regardless of a state of a data bus and to store task information by task ID; and a status storage unit configured to store status information based on task status by task ID.

Abstract: An embedded multimedia card (eMMC) comprises a clock channel configured to receive a clock signal from a host, a command channel configured to receive a command from the host, a plurality of data channels configured to transmit data to the host, a data strobe channel configured to transmit a data strobe signal synchronized with the data to the host, and a data strobe control unit configured to selectively enable or generate the data strobe signal according to a protocol control signal.

Abstract: An eMMC includes flash memory including an extended card specific data (CSD) register (“EXT_CSD register”), and an eMMC controller that controls operation of the flash memory. The eMMC controller is receives a clock from a host via a clock line, receives a SEND_EXT_CSD command from the host via a command line, and provides the host with eMMC information stored in the EXT_CSD register via a data bus in response to the SEND_EXT_CSD command, the eMMC information including maximum operating frequency information for the eMMC.

Abstract: An embedded multimedia card (eMMC) includes a clock channel that receives a clock signal from a host, a command channel that receives a command from the host, a plurality of data channels that transmit data to the host, and a return clock channel that transmits a return clock synchronized with the data to the host.

Abstract: A memory swapping method and a data processing system using the same, the memory swapping method including receiving queue information for a memory swapping task from a host device; performing part of the memory swapping task in a storage device based on the queue information; receiving a command corresponding to the queue information from the host device after performing of the part of the memory swapping task is completed; and performing a remaining part of the memory swapping task according to the command by using a result of the part of the memory swapping task that had been previously performed.