Abstract: The present disclosure relates to interior material attachment structure with wall attachment part bolt grooves, including: binding protrusions formed at the outermost part of the interior material attachment structure in order to attach the metal interior material; and connection part grooves formed adjacent to the binding protrusions in order to connect the plurality of interior material attachment structures to each other.

Abstract: The present invention relates to a circuit board including: a base board having a circuit region and a terminal region; a circuit pattern formed on an upper portion of the base board; and a low-melting-metal layer formed on an upper portion of the circuit pattern. A circuit board capable of reducing manufacturing time and manufacturing costs may be manufactured by omitting a photoresist process.

Abstract: According to an embodiment of the present invention, a method for producing a duplicate of a nano-pattern texture of a surface of an object through electroforming using an imprint mold comprises selecting the object having the nano-pattern texture, disposing the selected object and pretreating a surface of the object by washing, drying and then forming a nano-thin film thereto to block transfer of impurities, metallizing a surface of the plastic mold through, e.g., vapor deposition, spraying, and wet silver mirror reaction, and performing a first electroforming of the surface of the plastic mold, and repeating to thus manufacture a plurality of metal module master molds.

Abstract: A silicon solar cell is provided, including a first silicon layer that absorbing sunlight, a first layer of a structure of photonic crystals formed on the first silicon layer, and a second silicon layer formed on the first layer of a structure of photonic crystals and absorbing sunlight, wherein the first silicon layer and the second silicon layer absorb sunlight at different wavelengths and the first layer of structure of photonic crystals selectively reflects light of a wavelength absorbed by the second silicon layer.

Abstract: A method of duplicating the nano-pattern of the surface of an object is disclosed A method of duplicating the nano-pattern of the surface of an object comprises: selecting the object having the nano-pattern texture to be duplicated; disposing the selected object and pretreating a surface of the object by washing, drying and then forming a nano-thin film thereto to block transfer of impurities so as to facilitate separation of a nano-imprint mold; nano-imprinting the surface of the object, thus duplicating it on a plastic mold; metallizing a surface of the plastic mold and performing first electroforming of the plastic mold, thus manufacturing metal module master molds; preparing a standard pattern by scanning the surface of the object to achieve an two-dimensional image and three-dimensional depth information and determine a part of a scanned image of the surface of the object as the standard pattern; connecting the metal module master molds to each other through welding thus producing a large-area metal m

Abstract: Disclosed is a method of duplicating a nano-pattern texture of the surface of an object through electroforming using an imprint mold, including selecting the object having the surface texture to be duplicated; disposing the selected object and pre-treating the surface thereof; nano-imprinting the surface of the pretreated object, thus duplicating it on a plastic mold; metallizing the surface of the plastic mold through vapor deposition, and performing electroforming, thus manufacturing metal module master molds; trimming the edges of the metal module master molds, performing micro-processing, connecting the metal module master molds, and then performing electroforming, thus manufacturing a large-area metal unit master mold; and electroforming the metal unit master mold, thus producing a duplicate having the surface texture, thus exhibiting an effect in which the skin of a selected natural object can be duplicated on metal having a uniform thickness.

Abstract: Provided are a structure color of photonic crystals in which a new structure of a structure color of photonic crystals is provided so that a nanoimprint process can be performed and mass productivity is improved, a method of manufacturing thereof, and a manufacturing apparatus thereof. The method of manufacturing a structure color of photonic crystals includes: forming a plurality of basic element layers by using nanoimprinting, the plurality of basic element layers comprising a plurality of basic unit bodies each having a symmetrical cross-section and thin film connecting portions connecting the basic unit bodies! sequentially stacking the basic element layers! removing the thin film connecting portions by using etching; and determining whether the structure color of photonic crystals is completed, wherein, when it is determined that the structure color of photonic crystals is not completed, the forming, the stacking, and the removing are repeatedly performed.

Abstract: A silicon solar cell is provided, including a first silicon layer that absorbing sunlight, a first layer of a structure of photonic crystals formed on the first silicon layer, and a second silicon layer formed on the first layer of a structure of photonic crystals and absorbing sunlight, wherein the first silicon layer and the second silicon layer absorb sunlight at different wavelengths and the first layer of structure of photonic crystals selectively reflects light of a wavelength absorbed by the second silicon layer.

Abstract: Provided is a method of duplicating a nano-pattern texture of the surface of an object through electroforming using an imprint mold, including selecting the object having the surface texture to be duplicated; disposing the selected object and pre-treating the surface thereof; nano-imprinting the surface of the pretreated object, thus duplicating it on a plastic mold; metalizing the surface of the plastic mold through vapor deposition, and performing electroforming, thus manufacturing metal module master molds; trimming the edges of the metal module master molds, performing micro-processing, connecting the metal module master molds, and then performing electroforming, thus manufacturing a large-area metal unit master mold; and electroforming the metal unit master mold, thus producing a duplicate having the surface texture, thus exhibiting an effect in which the skin of a selected natural object can be duplicated on metal having a uniform thickness.

Abstract: Provided are a structure colour of photonic crystals in which a new structure of a structure colour of photonic crystals is provided so that a nanoimprint process can be performed and mass productivity is improved, a method of manufacturing thereof, and a manufacturing apparatus thereof. The method of manufacturing a structure colour of photonic crystals includes: forming a plurality of basic element layers by using nanoimprinting, the plurality of basic element layers comprising a plurality of basic unit bodies each having a symmetrical cross-section and thin film connecting portions connecting the basic unit bodies! sequentially stacking the basic element layers! removing the thin film connecting portions by using etching; and determining whether the structure colour of photonic crystals is completed, wherein, when it is determined that the structure colour of photonic crystals is not completed, the forming, the stacking, and the removing are repeatedly performed.

Abstract: Disclosed is a method of duplicating a nano-pattern texture of the surface of an object through electroforming using an imprint mold, including selecting the object having the surface texture to be duplicated; disposing the selected object and pre-treating the surface thereof; nano-imprinting the surface of the pretreated object, thus duplicating it on a plastic mold; metallizing the surface of the plastic mold through vapor deposition, and performing electroforming, thus manufacturing metal module master molds; trimming the edges of the metal module master molds, performing micro-processing, connecting the metal module master molds, and then performing electroforming, thus manufacturing a large-area metal unit master mold; and electroforming the metal unit master mold, thus producing a duplicate having the surface texture, thus exhibiting an effect in which the skin of a selected natural object can be duplicated on metal having a uniform thickness.

Abstract: CMOS integrated circuit devices include an electrically insulating layer and an unstrained silicon active layer on the electrically insulating layer. An insulated gate electrode is also provided on a surface of the unstrained silicon active layer. A Si1-xGex layer is also disposed between the electrically insulating layer and the unstrained silicon active layer. The Si1-xGex layer forms a first junction with the unstrained silicon active layer and has a graded concentration of Ge therein that decreases monotonically in a first direction extending from a peak level towards the surface of the unstrained silicon active layer. The peak Ge concentration level is greater than x=0.15 and the concentration of Ge in the Si1-xGex layer varies from the peak level to a level less than about x=0.1 at the first junction. The concentration of Ge at the first junction may be abrupt. More preferably, the concentration of Ge in the Si1-xGex layer varies from the peak level where 0.2<x<0.

Abstract: CMOS integrated circuit devices include an electrically insulating layer and an unstrained silicon active layer on the electrically insulating layer. An insulated gate electrode is also provided on a surface of the unstrained silicon active layer. A Si1-xGex layer is also disposed between the electrically insulating layer and the unstrained silicon active layer. The Si1-xGex layer forms a first junction with the unstrained silicon active layer and has a graded concentration of Ge therein that decreases monotonically in a first direction extending from a peak level towards the surface of the unstrained silicon active layer. The peak Ge concentration level is greater than x=0.15 and the concentration of Ge in the Si1-xGex layer varies from the peak level to a level less than about x=0.1 at the first junction. The concentration of Ge at the first junction may be abrupt. More preferably, the concentration of Ge in the Si1-xGex layer varies from the peak level where 0.2<x<0.

Abstract: CMOS integrated circuit devices include an electrically insulating layer and an unstrained silicon active layer on the electrically insulating layer. An insulated gate electrode is also provided on a surface of the unstrained silicon active layer. A Si1-xGex layer is also disposed between the electrically insulating layer and the unstrained silicon active layer. The Si1-xGex layer forms a first junction with the unstrained silicon active layer and has a graded concentration of Ge therein that decreases monotonically in a first direction extending from a peak level towards the surface of the unstrained silicon active layer. The peak Ge concentration level is greater than x=0.15 and the concentration of Ge in the Si1-xGex layer varies from the peak level to a level less than about x=0.1 at the first junction. The concentration of Ge at the first junction may be abrupt. More preferably, the concentration of Ge in the Si1-xGex layer varies from the peak level where 0.2<x<0.

Abstract: CMOS integrated circuit devices include an electrically insulating layer and an unstrained silicon active layer on the electrically insulating layer. An insulated gate electrode is also provided on a surface of the unstrained silicon active layer. A Si1-xGex layer is also disposed between the electrically insulating layer and the unstrained silicon active layer. The Si1-xGex layer forms a first junction with the unstrained silicon active layer and has a graded concentration of Ge therein that decreases monotonically in a first direction extending from a peak level towards the surface of the unstrained silicon active layer. The peak Ge concentration level is greater than x=0.15 and the concentration of Ge in the Si1-xGex layer varies from the peak level to a level less than about x=0.1 at the first junction. The concentration of Ge at the first junction may be abrupt. More preferably, the concentration of Ge in the Si1-xGex layer varies from the peak level where 0.2<x<0.

Abstract: CMOS integrated circuit devices include an electrically insulating layer and an unstrained silicon active layer on the electrically insulating layer. An insulated gate electrode is also provided on a surface of the unstrained silicon active layer. A Si1-xGex layer is also disposed between the electrically insulating layer and the unstrained silicon active layer. The Si1-xGex layer forms a first junction with the unstrained silicon active layer and has a graded concentration of Ge therein that decreases monotonically in a first direction extending from a peak level towards the surface of the unstrained silicon active layer. The peak Ge concentration level is greater than x=0.15 and the concentration of Ge in the Si1-xGex layer varies from the peak level to a level less than about x=0.1 at the first junction. The concentration of Ge at the first junction may be abrupt. More preferably, the concentration of Ge in the Si1-xGex layer varies from the peak level where 0.2<x<0.

Abstract: CMOS integrated circuit devices include an electrically insulating layer and an unstrained silicon active layer on the electrically insulating layer. An insulated gate electrode is also provided on a surface of the unstrained silicon active layer. A Si1-xGex layer is also disposed between the electrically insulating layer and the unstrained silicon active layer. The Si1-xGex layer forms a first junction with the unstrained silicon active layer and has a graded concentration of Ge therein that decreases monotonically in a first direction extending from a peak level towards the surface of the unstrained silicon active layer. The peak Ge concentration level is greater than x=0.15 and the concentration of Ge in the Si1-xGex layer varies from the peak level to a level less than about x=0.1 at the first junction. The concentration of Ge at the first junction may be abrupt. More preferably, the concentration of Ge in the Si1-xGex layer varies from the peak level where 0.2<x<0.

Abstract: CMOS integrated circuit devices include an electrically insulating layer and an unstrained silicon active layer on the electrically insulating layer. An insulated gate electrode is also provided on a surface of the unstrained silicon active layer. A Si1−xGex layer is also disposed between the electrically insulating layer and the unstrained silicon active layer. The Si1−xGex layer forms a first junction with the unstrained silicon active layer and has a graded concentration of Ge therein that decreases monotonically in a first direction extending from a peak level towards the surface of the unstrained silicon active layer. The peal Ge concentration level is greater than x=0.15 and the concentration of Ge in the Si1−xGex layer varies from the peak level to a level less than about x=0.1 at the first junction. The concentration of Ge at the first junction may be abrupt. More preferably, the concentration of Ge in the Si1−xGex layer varies from the peak level where 0.