Patents by Inventor KYUNGDUK LEE

KYUNGDUK LEE has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11966624
    Abstract: A storage device and an operating method thereof are provided. The storage device includes a memory configured to store parameter data used as an input in a neural network. The storage device also includes a storage controller configured to receive a request signal from a host. The storage controller is also configured to encode, based on the parameter data, log data in the neural network, the log data indicating contexts of the plurality of components, and transmit the encoded log data to the host.
    Type: Grant
    Filed: April 13, 2022
    Date of Patent: April 23, 2024
    Assignee: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: Jongsung Na, Youngseop Shim, Kyungduk Lee, Sangho Yi
  • Patent number: 11941271
    Abstract: A storage device performing a secure erase and an operating method thereof are provided. The storage device may include a controller configured to control a non-volatile memory device including a plurality of blocks. The controller includes a secure erase control logic configured to control a secure erase operation on the plurality of blocks and perform a control operation in response to a secure erase request from a host with respect to a first block among the plurality of blocks such that the secure erase operation on the first block is skipped based on a result of determining at least one selected from a secure erase state and/or a deterioration state of the first block.
    Type: Grant
    Filed: January 25, 2022
    Date of Patent: March 26, 2024
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Youhwan Kim, Jihwa Lee, Kyungduk Lee, Hosung Ahn
  • Publication number: 20240055030
    Abstract: A storage device including a non-volatile memory for storing data, a temperature sensor having resistance that changes according to temperature of the temperature sensor, and a temperature measurement circuit including a plurality of transistors, which are turned on or off based on a current of the temperature sensor and have different threshold voltages from one another. The temperature management circuit may be configured to apply a current to the temperature sensor and generate information indicating the temperature of the temperature sensor or indicating damage to the temperature sensor based on an output current obtained from the plurality of transistors.
    Type: Application
    Filed: June 2, 2023
    Publication date: February 15, 2024
    Inventors: Younsoo Cheon, Jihwa Lee, Kyungduk Lee
  • Publication number: 20240012703
    Abstract: An operating method of a storage controller which is configured to communicate with a host and with a non-volatile memory device. The method may include: generating an error count by counting a number of first-type error bits of a target super block of the non-volatile memory device, determining whether the error count exceeds a first reference value, fetching setting data from a latch unit of the non-volatile memory device, based on determining that the error count exceeds the first reference value, determining whether reference setting data of a setting table matches the fetched setting data, the reference setting data indicating information about a designed operating environment of the non-volatile memory device, and providing a reset request to the latch unit, based on determining that the reference setting data does not match the fetched setting data.
    Type: Application
    Filed: April 13, 2023
    Publication date: January 11, 2024
    Inventors: Kyungduk Lee, Youn-Soo Cheon
  • Patent number: 11869598
    Abstract: A storage device includes a controller configured to control a non-volatile memory device(s) having a plurality of memory blocks therein. The controller includes secure erase control logic configured to: (i) control secure erase operations on the plurality of memory blocks in response to a secure erase request received from a host, and (ii) set flags corresponding to the plurality of memory blocks such that a first flag corresponding to a first memory block, which has undergone at least two of the secure erase operations, has a first value. Adaptive control logic is provided, which is configured to change at least one operating condition associated with a write operation and/or read operation directed at the first memory block, in response to detecting that the first flag has the first value.
    Type: Grant
    Filed: January 20, 2022
    Date of Patent: January 9, 2024
    Inventors: Jihwa Lee, Youhwan Kim, Kyungduk Lee, Hosung Ahn
  • Patent number: 11860777
    Abstract: A memory management method of a storage device including: programming write-requested data in a memory block; counting an elapse time from a time when a last page of the memory block was programmed with the write-requested data; triggering a garbage collection of the storage device when the elapse time exceeds a threshold value; and programming valid data collected by the garbage collection at a first clean page of the memory block.
    Type: Grant
    Filed: July 16, 2020
    Date of Patent: January 2, 2024
    Assignee: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: Kyungduk Lee, Young-Seop Shim
  • Publication number: 20230418511
    Abstract: A storage device is provided. The storage device includes: a nonvolatile memory including memory cells divided into first and second memory cell groups; a memory controller; and a physically unclonable function (PUF) circuit configured to generate PUF data, based on an output of the second memory cell group, by excluding, from the output of the second memory cell group, outputs of a first exclusion area, a second exclusion area, and a third exclusion area, The first exclusion area has a threshold voltage equal to or greater than a first read level and less than a second read level, the second exclusion area has a threshold voltage less than a third read level that is less than the first read level, and the third exclusion area has a threshold voltage equal to or greater than a fourth read level that is greater than the second read level.
    Type: Application
    Filed: April 26, 2023
    Publication date: December 28, 2023
    Applicant: SAMSUNG ELECTRONCIS CO., LTD.
    Inventors: Hyunjoon Yoo, Kyungduk Lee
  • Publication number: 20230400992
    Abstract: Provided is a method for operating a memory device including performing a first setting operation on a first operation, reading map data based on the first setting operation, and performing a second setting operation on a second operation.
    Type: Application
    Filed: January 25, 2023
    Publication date: December 14, 2023
    Applicant: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: Kyungduk LEE, Youn-Soo CHEON, Daehyeon JO
  • Publication number: 20230402120
    Abstract: A data storage device including: a memory device including a plurality of memory blocks; and a memory controller configured to control the memory device, wherein the plurality of memory blocks are connected with row lines, wherein the row lines include word lines, wherein the memory controller is further configured to: check whether a resistive defect occurs at the row lines except for the word lines; and set a program operation time of a memory block corresponding to a row line, at which the resistive defect occurs, to be longer than a program operation time of the other memory blocks.
    Type: Application
    Filed: April 10, 2023
    Publication date: December 14, 2023
    Inventors: KYUNGDUK LEE, Ho-Sung Ahn, Youn-Soo Cheon
  • Patent number: 11791013
    Abstract: A storage device includes a plurality of nonvolatile memory devices, a storage controller circuit and a leakage detection circuit. The storage controller circuit controls a plurality of nonvolatile memory devices, the storage controller circuit includes a plurality of connection terminals, each of the plurality of connection terminals is commonly connected to a corresponding set of pins, from among the pluralities of pins included in the plurality of nonvolatile memory devices, via a corresponding connection node, from among a plurality of connection nodes. The pins included in each set of pins have a same attribute. The leakage detection circuit is configured to determine whether leakage occurs at each set of pins based on the merged signal generated by the connection node connected to each set of pins, and configured to provide the storage controller circuit with a detection signal indicating a result of the determination.
    Type: Grant
    Filed: July 22, 2021
    Date of Patent: October 17, 2023
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Seungjun Oh, Jihwa Lee, Kyungduk Lee
  • Patent number: 11748223
    Abstract: A method of operating a storage device including a plurality of nonvolatile memories, each of the plurality of nonvolatile memories including a temperature sensor, includes checking whether a predetermined temperature check cycle for the plurality of nonvolatile memories has been reached, monitoring, in response to the checking result, temperature information of at least some of the plurality of nonvolatile memories using the temperature sensor, obtaining standing time information of the plurality of nonvolatile memories by applying a temperature acceleration condition based on the monitored temperature information, and changing at least one of a plurality of driving parameters required for operating each of the plurality of nonvolatile memories based on at least one of the monitored temperature information and the obtained standing time information.
    Type: Grant
    Filed: December 28, 2021
    Date of Patent: September 5, 2023
    Assignee: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: Kyungduk Lee, Younsoo Cheon, Jihwa Lee
  • Patent number: 11727991
    Abstract: An operating method of a storage device includes monitoring a temperature of a nonvolatile memory device including a plurality of memory blocks, receiving a first request from a host, in response to the first request, transmitting a first command to the nonvolatile memory device when a first memory block corresponding to the first request is exposed at a temperature of a threshold temperature or higher for a first time period that is equal to or greater than a threshold time period and a second command to the nonvolatile memory device when the first memory block is exposed at a temperature lower than the threshold temperature for the threshold time period, charging word lines of the first memory block with a driving voltage in response to the first command, and performing a first operation corresponding to the first request in response to the first command or the second command.
    Type: Grant
    Filed: July 16, 2021
    Date of Patent: August 15, 2023
    Assignee: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: Youhwan Kim, Kyungduk Lee
  • Publication number: 20230195324
    Abstract: A storage device including: a memory device including a plurality of superblocks, wherein each superblock includes memory blocks included in a group of a plurality of non-volatile memories; and a controller for controlling the memory device, wherein the controller controls a first superblock among the plurality of superblocks to be erased to program data received from a host, controls the data to be programmed in the first superblock, controls the first superblock to be selected as a victim superblock for a garbage collection operation, and controls a media scanning operation to be performed on the memory device when a data duration is greater than a threshold, wherein the data duration is an interval between a first time point, at which the first superblock is erased, and a second time point, at which the first superblock is selected as the victim superblock.
    Type: Application
    Filed: November 21, 2022
    Publication date: June 22, 2023
    Inventors: Kyungduk LEE, Youngseop SHIM, Jongsung NA
  • Publication number: 20230176788
    Abstract: A storage device includes nonvolatile memories each including an internal temperature sensor; a memory controller configured having a plurality of operation commands defined for different temperature and an external temperature sensor. The memory controller obtains an external temperature value from the external temperature sensor in a first cycle, obtains an internal temperature value of the internal temperature sensor in a second cycle different from the first cycle, determines a temperature range of a target nonvolatile memory based on the external temperature value when a difference between the external temperature value and the internal temperature value is equal to or less than a first threshold value, to determine the temperature range based on the internal temperature value when the difference exceeds the first threshold, and to provide an operation command corresponding to the temperature range to the target nonvolatile memory.
    Type: Application
    Filed: September 14, 2022
    Publication date: June 8, 2023
    Inventors: KYUNGDUK LEE, Younsoo CHEON
  • Publication number: 20230096408
    Abstract: A storage device includes a communication circuit and a controller. The controller is configured to transmit log data to a host device through the communication circuit in response to receiving a first signal from the host device, receive a second signal, including an operation condition of an algorithm of the storage device, from the host device through the communication circuit, and change the operation condition of the algorithm on the basis of the second signal, wherein the algorithm includes one or more instructions for controlling an operation of the storage device.
    Type: Application
    Filed: August 29, 2022
    Publication date: March 30, 2023
    Inventors: Jongsung NA, Youngseop SHIM, Kyungduk LEE
  • Publication number: 20230071289
    Abstract: A storage device and an operating method thereof are provided. The storage device includes a memory configured to store parameter data used as an input in a neural network. The storage device also includes a storage controller configured to receive a request signal from a host. The storage controller is also configured to encode, based on the parameter data, log data in the neural network, the log data indicating contexts of the plurality of components, and transmit the encoded log data to the host.
    Type: Application
    Filed: April 13, 2022
    Publication date: March 9, 2023
    Inventors: Jongsung Na, Youngseop Shim, Kyungduk Lee, Sangho Yi
  • Publication number: 20230069623
    Abstract: A storage device and operating method thereof includes a storage controller configured to receive a get log page command from a host and transmit, to the host, log data about at least one context selected from among respective contexts of a plurality of components according to the get log page command, and a memory storing the log data, wherein the get log page command includes selection information for selecting at least one component from among the plurality of components.
    Type: Application
    Filed: April 12, 2022
    Publication date: March 2, 2023
    Inventors: Kyungduk Lee, Youngseop Shim, Jongsung Na, Inhwan Doh
  • Publication number: 20220413701
    Abstract: A storage device performing a secure erase and an operating method thereof are provided. The storage device may include a controller configured to control a non-volatile memory device including a plurality of blocks. The controller includes a secure erase control logic configured to control a secure erase operation on the plurality of blocks and perform a control operation in response to a secure erase request from a host with respect to a first block among the plurality of blocks such that the secure erase operation on the first block is skipped based on a result of determining at least one selected from a secure erase state and/or a deterioration state of the first block.
    Type: Application
    Filed: January 25, 2022
    Publication date: December 29, 2022
    Inventors: Youhwan Kim, Jihwa Lee, Kyungduk Lee, Hosung Ahn
  • Publication number: 20220415404
    Abstract: A storage device includes a controller configured to control a non-volatile memory device(s) having a plurality of memory blocks therein. The controller includes secure erase control logic configured to: (i) control secure erase operations on the plurality of memory blocks in response to a secure erase request received from a host, and (ii) set flags corresponding to the plurality of memory blocks such that a first flag corresponding to a first memory block, which has undergone at least two of the secure erase operations, has a first value. Adaptive control logic is provided, which is configured to change at least one operating condition associated with a write operation and/or read operation directed at the first memory block, in response to detecting that the first flag has the first value.
    Type: Application
    Filed: January 20, 2022
    Publication date: December 29, 2022
    Inventors: Jihwa Lee, Youhwan Kim, Kyungduk Lee, Hosung Ahn
  • Publication number: 20220197541
    Abstract: A storage device includes a plurality of nonvolatile memory devices, a storage controller circuit and a leakage detection circuit. The storage controller circuit controls a plurality of nonvolatile memory devices, the storage controller circuit includes a plurality of connection terminals, each of the plurality of connection terminals is commonly connected to a corresponding set of pins, from among the pluralities of pins included in the plurality of nonvolatile memory devices, via a corresponding connection node, from among a plurality of connection nodes. The pins included in each set of pins have a same attribute. The leakage detection circuit is configured to determine whether leakage occurs at each set of pins based on the merged signal generated by the connection node connected to each set of pins, and configured to provide the storage controller circuit with a detection signal indicating a result of the determination.
    Type: Application
    Filed: July 22, 2021
    Publication date: June 23, 2022
    Applicant: Samsung Electronics Co., Ltd.
    Inventors: Seungjun OH, Jihwa LEE, Kyungduk LEE