Patents by Inventor Kyungjin Kim

Kyungjin Kim has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 12039178
    Abstract: Disclosed herein are methods, apparatuses and systems related to manage memory blocks. A memory system can track a duration while a memory block remains open for programming operations. When the tracked duration meets or exceeds a corresponding threshold, the memory system can implement an internally commanded programming operation to store predetermined data into an open location that is adjacent to an end of the previously-written data in the memory block.
    Type: Grant
    Filed: July 14, 2022
    Date of Patent: July 16, 2024
    Assignee: Micron Technology, Inc.
    Inventor: Kyungjin Kim
  • Publication number: 20240231632
    Abstract: Aspects of the present disclosure configure a system component, such as a memory sub-system controller, to perform adaptive die selection for block family scan operations. The controller assigns a set of memory components to one or more groups of a plurality of groups based on respective storage characteristics of the set of memory components, each of the plurality of groups corresponding to different storage characteristics. The controller determines a maximum quantity of memory components to perform block family (BF) scan operations at an individual measurement period. The controller distributes the maximum quantity of memory components across the one or more groups to which the set of memory components are assigned and, at the individual measurement period, performs the BF scan operations on a portion of the set of memory components corresponding to the maximum quantity of memory components.
    Type: Application
    Filed: January 3, 2024
    Publication date: July 11, 2024
    Inventor: Kyungjin Kim
  • Publication number: 20240231673
    Abstract: Aspects of the present disclosure configure a system component, such as a memory sub-system controller, to identify a center of valley (CoV) of a set of read levels. The controller detects a read error associated with reading data from the set of memory components in accordance with an individual read level of a plurality of read levels and, in response to detecting the read error, generates a plurality of bins as a function of a plurality of check failure bit count values and one or more error count values corresponding to a set of read levels adjacent to the individual read level. The controller computes the CoV for the individual read level based on a pair of read levels defined by a set of the plurality of bins and updates a read level used to read the data based on the computed CoV.
    Type: Application
    Filed: October 24, 2022
    Publication date: July 11, 2024
    Inventor: Kyungjin Kim
  • Publication number: 20240220345
    Abstract: Aspects of the present disclosure configure a system component, such as a memory sub-system controller, to detect erroneous empty pages. The controller detects a read error associated with reading data from a set of memory components in accordance with an individual read level of a plurality of read levels. In response to detecting the read error, the controller computes one or more check failure unit count values corresponding to the individual read level. The controller compares the one or more check failure unit count values to a threshold value and determines whether the read error corresponds to an empty page read error based on a result of comparing the one or more check failure unit count values to the threshold value.
    Type: Application
    Filed: December 29, 2023
    Publication date: July 4, 2024
    Inventor: Kyungjin Kim
  • Patent number: 12001680
    Abstract: An example method of performing read operation with respect to a memory device comprises: receiving a request to perform a read operation with respect to a memory page of a memory device; identifying a block family associated with a block comprising the memory page; determining a block family-based read voltage level associated with the block family; performing, using the block family-based read voltage level, a read operation with respect to the memory page; determining, by performing an error correction operation with respect to the memory page, a new read voltage level associated with the block family; and associating, by a last successful read voltage level memory data structure, the new read voltage level as a last the successful read voltage level with the block family.
    Type: Grant
    Filed: August 24, 2022
    Date of Patent: June 4, 2024
    Assignee: Micron Technology, Inc.
    Inventor: Kyungjin Kim
  • Publication number: 20240134559
    Abstract: Aspects of the present disclosure configure a system component, such as a memory sub-system controller, to identify a center of valley (CoV) of a set of read levels. The controller detects a read error associated with reading data from the set of memory components in accordance with an individual read level of a plurality of read levels and, in response to detecting the read error, generates a plurality of bins as a function of a plurality of check failure bit count values and one or more error count values corresponding to a set of read levels adjacent to the individual read level. The controller computes the CoV for the individual read level based on a pair of read levels defined by a set of the plurality of bins and updates a read level used to read the data based on the computed CoV.
    Type: Application
    Filed: October 23, 2022
    Publication date: April 25, 2024
    Inventor: Kyungjin Kim
  • Publication number: 20240069734
    Abstract: An example method of performing read operation with respect to a memory device comprises: receiving a request to perform a read operation with respect to a memory page of a memory device; identifying a block family associated with a block comprising the memory page; determining a block family-based read voltage level associated with the block family; performing, using the block family-based read voltage level, a read operation with respect to the memory page; determining, by performing an error correction operation with respect to the memory page, a new read voltage level associated with the block family; and associating, by a last successful read voltage level memory data structure, the new read voltage level as a last the successful read voltage level with the block family.
    Type: Application
    Filed: August 24, 2022
    Publication date: February 29, 2024
    Inventor: Kyungjin Kim
  • Publication number: 20240020037
    Abstract: Disclosed herein are methods, apparatuses and systems related to manage memory blocks. A memory system can track a duration while a memory block remains open for programming operations. When the tracked duration meets or exceeds a corresponding threshold, the memory system can implement an internally commanded programming operation to store predetermined data into an open location that is adjacent to an end of the previously-written data in the memory block.
    Type: Application
    Filed: July 14, 2022
    Publication date: January 18, 2024
    Inventor: Kyungjin Kim
  • Publication number: 20230373994
    Abstract: The present invention relates to a pyrrolopyridine derivative, a racemate thereof, a stereoisomer thereof, or a pharmaceutically acceptable salt thereof, and use thereof. The compound of the present invention has high selectivity and bioactivity against human immunodeficiency virus (HIV), and low toxicity, thus being useful as a therapeutic agent for viral infection, particularly human immunodeficiency virus (HIV) infection.
    Type: Application
    Filed: August 20, 2021
    Publication date: November 23, 2023
    Applicant: ST PHARM CO., LTD.
    Inventors: Kyungjin Kim, Uk-Il Kim, Hyung Tae Bang, Seul Ki Lee, Si Yeon Han
  • Patent number: 11655268
    Abstract: The present disclosure relates to a novel nucleoside or nucleotide derivative, a racemate thereof, a stereoisomer thereof, or a pharmaceutically acceptable salt thereof; and a pharmaceutical composition for preventing or treating viral infection-associated diseases, containing the same as an active ingredient.
    Type: Grant
    Filed: January 24, 2019
    Date of Patent: May 23, 2023
    Assignee: ST PHARM CO., LTD.
    Inventors: Kyungjin Kim, Meehyein Kim, Uk-Il Kim, Yun Young Go, Hwajung Nam, Hyung Tae Bang, Jin Soo Shin, Jihye Yoon, Yejin Jang
  • Patent number: 11483014
    Abstract: A controller of a memory system performs a soft decoding without additional reads. The controller applies each of read voltages to cells to obtain a corresponding cell count and corresponding data, stores the obtained data, and processes the stored data. The controller determines a set of parameters, based on (i) the read voltages, (ii) cell counts corresponding to the read voltages and (iii) a non-negative regularization parameter. The controller estimates an optimal read voltage based on the set of parameters, generates log-likelihood ratio (LLR) values using the processed data and the optimal read voltage and performs soft decoding using the LLR values.
    Type: Grant
    Filed: December 22, 2020
    Date of Patent: October 25, 2022
    Assignee: SK hynix Inc.
    Inventor: Kyungjin Kim
  • Publication number: 20220235011
    Abstract: Provided is a phthalazinone compound, or a racemate, steroisomer or pharmaceutically acceptable salt thereof; a pharmaceutical composition for the prevention or treatment of Sirt6-associated diseases, including as an active ingredient, a phthalazinone compound, or a racemate, steroisomer or pharmaceutically acceptable salt thereof; and a method for treating Sirt6-associated diseases including administering a phthalazinone compound, or a racemate, steroisomer or pharmaceutically acceptable salt thereof to a subject in need.
    Type: Application
    Filed: May 29, 2020
    Publication date: July 28, 2022
    Applicants: ST PHARM CO., LTD., KOREA RESEARCH INSTITUTE OF CHEMICAL TECHNOLOGY
    Inventors: Kyungjin KIM, Kwangrok KIM, Uk-Il KIM, Hyung Tae BANG, Seul Ki LEE, Kwan-Young JEONG, Seung Kyu KANG, Heejung JUNG, Sang Dal RHEE, Won Hoon JUNG, Jun Mi LEE
  • Publication number: 20220200633
    Abstract: A controller of a memory system performs a soft decoding without additional reads. The controller applies each of read voltages to cells to obtain a corresponding cell count and corresponding data, stores the obtained data, and processes the stored data. The controller determines a set of parameters, based on (i) the read voltages, (ii) cell counts corresponding to the read voltages and (iii) a non-negative regularization parameter. The controller estimates an optimal read voltage based on the set of parameters, generates log-likelihood ratio (LLR) values using the processed data and the optimal read voltage and performs soft decoding using the LLR values.
    Type: Application
    Filed: December 22, 2020
    Publication date: June 23, 2022
    Inventor: Kyungjin KIM
  • Patent number: 11265021
    Abstract: A memory controller performs an error recovery operation. The controller performs a read operation on a select block using a select read level; decodes data associated with the read operation to generate a syndrome value; determines whether to stop, before a maximum number of iterations, the read operation and the decoding at the select read level, using the syndrome value; when it is determined to stop the read operation and the decoding at the select read level, selects a next read level in a sequence of read levels; and uses the next read level for a subsequent read operation.
    Type: Grant
    Filed: March 10, 2020
    Date of Patent: March 1, 2022
    Assignee: SK hynix Inc.
    Inventors: Kyungjin Kim, Jaedeog Cho
  • Publication number: 20220054644
    Abstract: The present invention provides a novel drug delivery conjugated moiety for oral administration of a drug that is not suitable for oral administration or a pharmaceutically acceptable salt thereof. When the drug delivery conjugated moiety of the present invention or a pharmaceutically acceptable salt thereof is combined with a drug, which is not suitable for oral administration, and is administered orally, it exhibits an excellent absorption rate without decreasing the biological activities of the drug. Moreover, the drug delivery conjugated moiety of the present invention or a pharmaceutically acceptable salt thereof can be easily prepared in a few steps, which is very advantageous in terms of mass production.
    Type: Application
    Filed: November 2, 2021
    Publication date: February 24, 2022
    Inventors: Kyungjin KIM, Jisuk YUN, Hyukjun JUNG, Myungyun LEE, Hwajung NAM, Ok-cheol JEON
  • Patent number: 11214570
    Abstract: Provided is a novel pyrrolopyridine compound represented by Chemical Formula I, a racemate or a stereoisomer thereof, or a pharmaceutically acceptable salt thereof; and to a method for preparing the same. A compound represented by Chemical Formula I shows high selectivity and antiviral activity against human immunodeficiency virus (HIV), with low toxicity; therefore, it is useful as a therapeutic agent for viral infection, in particular, HIV infection.
    Type: Grant
    Filed: March 24, 2017
    Date of Patent: January 4, 2022
    Assignee: ST PHARM CO., LTD.
    Inventors: Bong Jin Kim, Ill Young Lee, Jae Hak Kim, Hong Suk Shin, Jong Chan Son, Chong-Kyo Lee, Kyungjin Kim, Uk-Il Kim, Hwa Jung Nam
  • Patent number: 11163483
    Abstract: Disclosed are devices, systems and methods for improving the reliability of retrieving information from a memory device. An exemplary method includes obtaining a plurality of cell counts for each of a plurality of read voltages applied to the memory device, each of the plurality of cell counts representing a number of cells having a cell voltage value that is within a voltage band corresponding to the read voltage applied thereto, generating, based on the plurality of cell counts, the plurality of read voltages and a design parameter, a set of estimated parameters, the design parameter being based on one or more properties of the memory device, determining an updated read voltage based on the estimated set of parameters, and applying the updated read voltage to the memory device to retrieve the information from the memory device.
    Type: Grant
    Filed: December 9, 2019
    Date of Patent: November 2, 2021
    Assignee: SK hynix Inc.
    Inventors: Yongjune Kim, Kyungjin Kim
  • Publication number: 20210288670
    Abstract: A memory controller performs an error recovery operation. The controller performs a read operation on a select block using a select read level; decodes data associated with the read operation to generate a syndrome value; determines whether to stop, before a maximum number of iterations, the read operation and the decoding at the select read level, using the syndrome value; when it is determined to stop the read operation and the decoding at the select read level, selects a next read level in a sequence of read levels; and uses the next read level for a subsequent read operation.
    Type: Application
    Filed: March 10, 2020
    Publication date: September 16, 2021
    Inventors: Kyungjin KIM, Jaedeog CHO
  • Publication number: 20210227647
    Abstract: A cooking appliance including a cooking chamber configured to cook food therein and openable in a first direction, a shelf provided to be inserted into the cooking chamber in the first direction and on which food is placed, and a plurality of heaters configured to supply heat to the shelf and disposed at one side of the cooking chamber. Where the shelf includes a first area arranged at one side in a second direction perpendicular to the first direction and a second area arranged at another side in the second direction. The plurality of heaters includes a first heater disposed to correspond to the first area in a third direction perpendicular to the first and second areas and a second heater disposed to correspond to the second area in the third direction. The plurality of heaters configured to provide more heat to the first area than to the second area.
    Type: Application
    Filed: January 15, 2021
    Publication date: July 22, 2021
    Inventors: Jiho JEONG, Kyungjin KIM, Eonjoong KIM, Inki JEON
  • Publication number: 20210227648
    Abstract: A cooking appliance including a cooking chamber configured to cook food therein and openable in a first direction, a shelf provided to be inserted into the cooking chamber in the first direction and having a cooking surface on which food is placed, a magnetron configured to generate high frequency waves to be supplied to the shelf, and a heat generating member configured to generate heat by the high frequency waves generated by the magnetron. Where the cooking surface includes a first area on one side and a second area on another side, the heat generating member includes a first heat generating portion configured to supply heat to the first area and a second heat generating portion disposed to correspond to the second area, and the first heat generating portion supplies more heat to the first area than the second heat generating portion supplies to the second area.
    Type: Application
    Filed: January 15, 2021
    Publication date: July 22, 2021
    Inventors: Sanggyun YE, Kyungjin KIM, Eonjoong KIM, Taehun KIM, Jeawon LEE, Inki JEON, Jiho JEONG, Seunggee HONG