Abstract: A memory controller for controlling a flash memory device is provided. The memory controller generates pattern data, a program command, and a read command, transmits the program command and first data corresponding to the pattern data to the flash memory device so that the first data is programmed to the flash memory device, receives first read data corresponding to the first data, receives a first read data strobe signal, compares the first data with second data corresponding to the first read data, and performs a data training operation according to a comparison result. The first read data and the first read strobe signal are transmitted from the flash memory device in response to the read command.

Abstract: A solid state disk controller includes a volatile memory having a memory area storing sector bit map values, and a memory controller. In a read operation, the memory controller selectively reads at least one sector among a plurality of sectors forming a page of an external non-volatile memory based on the sector bit map values stored in the memory area, indicated by a pointer.

Abstract: A solid state disk controller includes a volatile memory having a memory area storing sector bit map values, and a memory controller. In a read operation, the memory controller selectively reads at least one sector among a plurality of sectors forming a page of an external non-volatile memory based on the sector bit map values stored in the memory area, indicated by a pointer.

Abstract: An apparatus and method for controlling a packet flow according to the bandwidth of corresponding ports, including a plurality of ports configured to compare a first packet number and a second packet number, and generate a packet flow control signal based on the comparison result, the packet flow control signal being used to control the packet flow.

Abstract: In a device and method for controlling packet flow, priority data of a packet received by one of a plurality of ports are determined. A packet memory is monitored to determine whether an address pointer of the packet memory exceeds a predetermined limit value. A port is selected to control packet flow by using the priority data when the address pointer of the packet memory exceeds the predetermined limit value. Then, the selected port is directed to control the packet flow. By using the priority data designated to a packet or a port, the packet flow may be controlled in consideration of various kinds of network services.

Abstract: An apparatus and method for controlling a packet flow according to the bandwidth of corresponding ports, including a plurality of ports configured to compare a first packet number and a second packet number, and generate a packet flow control signal based on the comparison result, the packet flow control signal being used to control the packet flow.

Abstract: In a device and method for controlling packet flow, priority data of a packet received by one of a plurality of ports are determined. A packet memory is monitored to determine whether an address pointer of the packet memory exceeds a predetermined limit value. A port is selected to control packet flow by using the priority data when the address pointer of the packet memory exceeds the predetermined limit value. Then, the selected port is directed to control the packet flow. By using the priority data designated to a packet or a port, the packet flow may be controlled in consideration of various kinds of network services.