Patents by Inventor L. J. Reed

L. J. Reed has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Output multiplexer having one gate delay
    Patent number: 4486880
    Abstract: A multiplexer comprises a select circuit having a plurality of OR gates responsive to digital select signals. Transistors within the OR gates are collector dotted and provide a plurality of select circuit outputs to a plurality of AND gates which are also responsive to a plurality of input signals. The collector dotting of the four OR gates of the select circuit provides a multiplexer having a single gate delay of data transmission. The multiplexer consumes less current by having only a single current source for the AND gates.
    Type: Grant
    Filed: December 9, 1982
    Date of Patent: December 4, 1984
    Assignee: Motorola, Inc.
    Inventors: Philip A. Jeffery, L. J. Reed, Harold L. Spangler
  • Digital frequency synthesizer having selectable frequency offset between transmit and receive frequencies
    Patent number: 4002995
    Abstract: A digital frequency synthesizer includes a phase locked loop having dual presetting means for enabling the loop to generate a first frequency signal (e.g., "transmit" signal) for each of many selectable channels and generate a second frequency signal (e.g., "receiver" signal) in the form of the first frequency signal set off by an intermediate frequency (e.g., IF frequency) and programmable means for varying the frequency offset.
    Type: Grant
    Filed: July 7, 1975
    Date of Patent: January 11, 1977
    Assignee: Motorola, Inc.
    Inventor: L. J. Reed