Patents by Inventor LaVaughn F. Watts
LaVaughn F. Watts has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 9021283Abstract: An apparatus having a processing unit and a monitor for monitoring activity associated with said processing unit. The monitor enables selective lowering of the frequency of clock signals, or stopping and starting of clock signals, being received by said processing unit in response to a changing level of activity associated with said processing unit.Type: GrantFiled: April 30, 2004Date of Patent: April 28, 2015Assignee: Texas Instruments IncorporatedInventor: LaVaughn F. Watts, Jr.
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Patent number: 8566621Abstract: A method for detecting temperature associated with a processor, results of the detecting being used for controlling power dissipation associated with the processor and/or apparatus and/or system employing the same.Type: GrantFiled: October 22, 2010Date of Patent: October 22, 2013Assignee: Texas Instruments IncorporatedInventor: LaVaughn F. Watts, Jr.
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Publication number: 20110072282Abstract: A method for detecting temperature associated with a processor, results of the detecting being used for controlling power dissipation associated with the processor and/or apparatus and/or system employing the same.Type: ApplicationFiled: October 22, 2010Publication date: March 24, 2011Inventor: LaVaughn F. Watts, JR.
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Patent number: 7822996Abstract: A method for detecting temperature associated with a processor, results of the detecting being used for controlling power dissipation associated with the processor and/or apparatus and/or system employing the same.Type: GrantFiled: March 19, 2007Date of Patent: October 26, 2010Assignee: Texas Instruments IncorporatedInventor: LaVaughn F. Watts, Jr.
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Patent number: 7549071Abstract: A method for providing power conservation in a processor in which, depending on the respective embodiment, a relative amount of idle time, activity time, or idle time and activity time associated with the processor are measured or detected, results of the measuring being used by the processor for controlling a clock speed. Yet other embodiments disclose, depending upon the respective embodiment, a relative amount of Input/Output (I/O), relative importance of Input/Output (I/O), and/or relative amount of time between Input/Output (I/O), associated with the processor are measured, results of the measuring being used by the processor to control power dissipation associated with the processor.Type: GrantFiled: May 3, 2005Date of Patent: June 16, 2009Assignee: Texas Instruments IncorporatedInventors: LaVaughn F. Watts, Jr., Steven J. Wallace
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Patent number: 7549007Abstract: The present invention provides a solution to the dual problems of mobility and portability associated with using a portable telephone in combination with a portable computer. A portable computer (164) has an interface (172, 192, 204) that facilitates a direct connection to a portable telephone (166). The interface (172, 192, 204) electrically connects the portable telephone (166) to the portable computer (164) thus eliminating the need for a cable or tethered connection between the portable computer (164) and a portable telephone (166). In one embodiment of the invention, the portable telephone (166) is constructed to fit within a cavity (210) in the portable computer (164). When fully inserted into the computer (164), the portable telephone (166) is physically connected to the portable computer (164) by a latching mechanism and communicates with the portable computer by means of a computer/portable telephone interface (172, 192, 204 that electrically connects the portable telephone to the portable computer).Type: GrantFiled: December 7, 1995Date of Patent: June 16, 2009Assignee: Texas Instruments IncorporatedInventors: Ronald L. Smith, LaVaughn F. Watts, Jr., Thomas R. Grimm
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Patent number: 7392416Abstract: A method for controlling power consumption associated with a processor in which, depending on the respective embodiment, a relative amount of idle time, activity time, or idle time and activity time associated with the processor are measured or detected, results of the measuring being used by the processor for controlling a clock speed.Type: GrantFiled: May 6, 2005Date of Patent: June 24, 2008Assignee: Texas Instruments IncorporatedInventors: LaVaughn F. Watts, Jr., Steven J. Wallace
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Patent number: 7284139Abstract: A processor, comprising a monitor for, depending on the respective embodiment, measuring a relative amount of idle time, activity time, or idle time and activity time associated with the processor, results of the measuring being used by the processor for controlling a clock speed. Yet other embodiments disclose, depending upon the respective embodiment, a processor, comprising a monitor for measuring the relative amount of Input/Output (I/O), relative importance of Input/Output (I/O), and/or relative amount of time between Input/Output (I/O), associated with the processor, results of the measuring being used by the processor to control power dissipation associated with the processor.Type: GrantFiled: May 3, 2005Date of Patent: October 16, 2007Assignee: Texas Instruments IncorporatedInventors: LaVaughn F. Watts, Jr., Steven J. Wallace
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Patent number: 7194646Abstract: A real-time thermal management apparatus and method for a computer employs a monitor (40) to determine whether a CPU may rest based upon real-time sampling of temperature levels and CPU activity levels within the computer. The monitor activates a hardware selector to carry out the monitor's determination. If the monitor determines the CPU may rest, the hardware selector reduces CPU clock time; if the CPU is to be active, the hardware selector returns the CPU to its previous high speed clock level. Switching back into full operation from its rest state occurs without a user having to request it and without any delay in the operation of the computer while waiting for the computer to return to a “ready” state. Furthermore, the monitor (40) adjusts the performance level of the computer in response to the real-time sampling of CPU activity and temperature levels.Type: GrantFiled: December 7, 1995Date of Patent: March 20, 2007Assignee: Texas Instruments IncorporatedInventor: LaVaughn F. Watts, Jr.
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Patent number: 7028198Abstract: A processor, comprising a monitor for, depending on the respective embodiment, measuring the relative amount of idle time, activity time, or idle time and activity time within the processor, results of the measuring being used by the processor for controlling a clock speed of the processor. Yet other embodiments disclose, depending upon the respective embodiment, a processor, comprising a monitor for measuring the relative amount of idle time, activity time or idle time and activity time within the processor, results of the measuring being used by the processor to control power dissipation associated with the processor.Type: GrantFiled: April 30, 2004Date of Patent: April 11, 2006Assignee: Texas Instruments IncorporatedInventors: LaVaughn F. Watts, Jr., Steven J. Wallace
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Publication number: 20040225906Abstract: A real-time power conservation apparatus and method for portable computers employs a monitor to determine whether a CPU may rest based upon a real-time sampling of the CPU activity level and to activate a hardware selector to carry out the monitor's determination. If the monitor determines the CPU may rest, the hardware selector reduces CPU clock time; if the CPU is to be active, the hardware selector returns the CPU to its previous high speed clock level. Switching back into full operation from its rest state occurs without a user having to request it and without any delay in the operation of the computer while waiting for the computer to return to a “ready” state. Furthermore, the monitor adjusts the performance level of the computer to manage power conservation in response to the real-time sampling of CPU activity.Type: ApplicationFiled: April 30, 2004Publication date: November 11, 2004Inventors: LaVaughn F. Watts, Steven J. Wallace
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Publication number: 20040225908Abstract: A processor, comprising a monitor for, depending on the respective embodiment, measuring the relative amount of idle time, activity time, or idle time and activity time within the processor, results of the measuring being used by the processor for controlling a clock speed of the processor. Yet other embodiments disclose, depending upon the respective embodiment, a processor, comprising a monitor for measuring the relative amount of idle time, activity time or idle time and activity time within the processor, results of the measuring being used by the processor to control power dissipation associated with the processor.Type: ApplicationFiled: April 30, 2004Publication date: November 11, 2004Inventors: LaVaughn F. Watts, Steven J. Wallace
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Patent number: 6732283Abstract: A processor, comprising a monitor for, depending on the respective embodiment, measuring the relative amount of idle time, activity time, or idle time and activity time within the processor, results of the measuring being used by the processor for controlling a clock speed of the processor. Yet other embodiments disclose, depending upon the respective embodiment, a processor, comprising a monitor for measuring the relative amount of idle time, activity time or idle time and activity time within the processor, results of the measuring being used by the processor to control power dissipation associated with the processor.Type: GrantFiled: February 28, 2003Date of Patent: May 4, 2004Assignee: Texas Instruments IncorporatedInventors: LaVaughn F. Watts, Jr., Steven J. Wallace
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Patent number: 6732284Abstract: A processor, comprising a monitor for measuring the relative amount of idle time within the processor, results of the measuring being used by the processor, depending upon the respective embodiment, to modify processor clock speed in response to a utilization percentage of the processor being below a preselected level, or to modify a clock speed of the processor to control a utilization percentage of the processor. Another embodiment discloses a processor, comprising a monitor for measuring the relative amount of idle time within the processor, results of the measuring being used by the processor for providing a signal for circuitry for controlling periods of time a processor clock is in an OFF state, the length of the periods of time said clock is in an OFF state being appropriate to allow the processor to operate at an efficient utilization percentage.Type: GrantFiled: February 28, 2003Date of Patent: May 4, 2004Assignee: Texas Instruments IncorporatedInventors: LaVaughn F. Watts, Jr., Steven J. Wallace
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Patent number: 6725310Abstract: Customer requirements for portable computers are grouped into logical functional groupings, which are further grouped into logical bandwidth levels. On the notebook side, all required signals for a specific logical functional grouping are combined into a single carrier with the necessary bandwidth for the signals within the logical bandwidth level. This combined signal is then passed through a docking connector. The individual signals are regenerated on the docking solution side of the connector. Logic on both the notebook and docking solution sides of the connector enables the respective devices to identify which carrier bandwidths are supported on both sides of the docking connector and settle on the greatest common denominator. Additionally, the signals combined into the carrier can be programmed, in which case the docking solution and the notebook negotiate the features that are and are not supported in each individual case.Type: GrantFiled: January 26, 2001Date of Patent: April 20, 2004Assignee: Dell Products L.P.Inventors: Howard A. Shoobe, LaVaughn F. Watts, Jr., James Leftwich
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Patent number: 6687777Abstract: A method and apparatus of connecting an active computing device (15) to an active peripheral option (20) comprising the steps of making a physical connection (210) between the device (15) and the option (20) wherein the option (20) is communicably linked (44) to one or more peripheral devices (35, 40). A system interrupt signal is generated (240) and detected (250) by the system processor (17) causing all activity along the connection path between the device (15) and the option (20) to be suspended (250).Type: GrantFiled: November 27, 2002Date of Patent: February 3, 2004Assignee: Texas Instruments IncorporatedInventors: Gary J. Verdun, LaVaughn F. Watts, Jr., Randall Juenger
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Publication number: 20030200370Abstract: Customer requirements for portable computers are grouped into logical functional groupings, which are further grouped into logical bandwidth levels. On the notebook side, all required signals for a specific logical functional grouping are combined into a single carrier with the necessary bandwidth for the signals within the logical bandwidth level. This combined signal is then passed through a docking connector. The individual signals are regenerated on the docking solution side of the connector. Logic on both the notebook and docking solution sides of the connector enables the respective devices to identify which carrier bandwidths are supported on both sides of the docking connector and settle on the greatest common denominator. Additionally, the signals combined into the carrier can be programmed, in which case the docking solution and the notebook negotiate the features that are and are not supported in each individual case.Type: ApplicationFiled: January 26, 2001Publication date: October 23, 2003Inventors: Howard A. Shoobe, LaVaughn F. Watts, James Leftwich
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Patent number: 6633988Abstract: A processor, comprising a monitor for measuring the relative amount of Input/Output (I/O) within the processor, results of the measuring being used by the processor for controlling a clock speed of the processor. Another embodiment discloses a processor, comprising a monitor for measuring the relative importance of Input/Output (I/O) within the processor, results of the measuring being used by the processor for controlling a clock speed of said processor. Still another embodiment discloses a processor, comprising a monitor for measuring the relative amount of time between Input/Output (I/O) within the processor, results of the measuring being used by the processor for controlling a clock speed of the processor.Type: GrantFiled: February 11, 2002Date of Patent: October 14, 2003Assignee: Texas Instruments IncorporatedInventors: LaVaughn F. Watts, Jr., Steven J. Wallace
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Publication number: 20030191972Abstract: In order to overcome the relatively short battery life and the relatively long delay between the activation and the actual functioning of a typical portable data processing system or notebook having an industry standard personal computer architecture (ISPCA), the portable system is provided with both an ISPCA processing section, a non-standard personal computer architecture (NSPCA) processing section and a common section including apparatus common to both processing sections. The NSPCA processing section operates under an operating system such as the Windows CE operating system, having reduced functionality, but being capable of “instant-on” operation. The data processing system includes controllable reduced power (and reduced functionality) mode wherein only the NSPCA processing is activated. The data processing system can controllably be transferred to a higher power (and full functionality) mode operating by activating the ISPCA processing section.Type: ApplicationFiled: October 8, 1999Publication date: October 9, 2003Inventor: LAVAUGHN F. WATTS
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Publication number: 20030131272Abstract: A real-time power conservation apparatus and method for portable computers employs a monitor to determine whether a CPU may rest based upon a real-time sampling of the CPU activity level and to activate a hardware selector to carry out the monitor's determination. If the monitor determines the CPU may rest, the hardware selector reduces CPU clock time; if the CPU is to be active, the hardware selector returns the CPU to its previous high speed clock level. Switching back into full operation from its rest state occurs without a user having to request it and without any delay in the operation of the computer while waiting for the computer to return to a “ready” state. Furthermore, the monitor adjusts the performance level of the computer to manage power conservation in response to the real-time sampling of CPU activity.Type: ApplicationFiled: February 28, 2003Publication date: July 10, 2003Inventors: LaVaughn F. Watts, Steven J. Wallace