Patents by Inventor Lai-Hock Chua

Lai-Hock Chua has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 9122583
    Abstract: A data writing method for a memory storage device having physical unit unions is provided, wherein each of the physical unit unions includes upper physical units and lower physical units. The method includes partitioning the physical unit unions into a storage area including a data area and a spare area; configuring logical units for mapping to the physical unit unions of the data area; and receiving update data from a host system. The method also includes: selecting several physical unit unions from the spare area as buffer physical unit unions; writing the update data only to a part of each of the buffer physical unit unions; and moving the update data from buffer physical unit unions to the storage area by using a copy procedure. Therefore, the time of performing a write command can be shorten and the lifespan of the memory storage device can be prolonged effectively.
    Type: Grant
    Filed: July 1, 2012
    Date of Patent: September 1, 2015
    Assignee: PHISON ELECTRONICS CORP.
    Inventors: Kheng-Chong Tan, Lai-Hock Chua
  • Patent number: 9009399
    Abstract: A flash memory storage system having a flash memory controller and a flash memory chip is provided. The flash memory controller configures a second physical unit of the flash memory chip as a midway cache physical unit corresponding to a first physical unit and temporarily stores first data corresponding to a first host write command and second data corresponding to a second host write command in the midway cache physical unit, wherein the first and second data corresponding to slow physical addresses of the first physical unit. Then, the flash memory controller synchronously copies the first and second data from the midway cache physical unit into the first physical unit, thereby shortening time for writing data into the flash memory chip.
    Type: Grant
    Filed: October 22, 2014
    Date of Patent: April 14, 2015
    Assignee: Phison Electronics Corp.
    Inventors: Lai-Hock Chua, Kheng-Chong Tan
  • Publication number: 20150039820
    Abstract: A flash memory storage system having a flash memory controller and a flash memory chip is provided. The flash memory controller configures a second physical unit of the flash memory chip as a midway cache physical unit corresponding to a first physical unit and temporarily stores first data corresponding to a first host write command and second data corresponding to a second host write command in the midway cache physical unit, wherein the first and second data corresponding to slow physical addresses of the first physical unit. Then, the flash memory controller synchronously copies the first and second data from the midway cache physical unit into the first physical unit, thereby shortening time for writing data into the flash memory chip.
    Type: Application
    Filed: October 22, 2014
    Publication date: February 5, 2015
    Inventors: Lai-Hock Chua, Kheng-Chong Tan
  • Patent number: 8904086
    Abstract: A flash memory storage system having a flash memory controller and a flash memory chip is provided. The flash memory controller configures a second physical unit of the flash memory chip as a midway cache physical unit corresponding to a first physical unit and temporarily stores first data corresponding to a first host write command and second data corresponding to a second host write command in the midway cache physical unit, wherein the first and second data corresponding to slow physical addresses of the first physical unit. Then, the flash memory controller synchronously copies the first and second data from the midway cache physical unit into the first physical unit, thereby shortening time for writing data into the flash memory chip.
    Type: Grant
    Filed: February 22, 2010
    Date of Patent: December 2, 2014
    Assignee: Phison Electronics Corp.
    Inventors: Lai-Hock Chua, Kheng-Chong Tan
  • Patent number: 8589620
    Abstract: A data writing method for a rewritable non-volatile memory module is provided. The method includes receiving at least one update data, wherein the update data belongs to at least one logical page of a first logical block, and the first logical block is mapped to a first physical block. The method also includes when a physical page of a second physical block that is corresponding to the logical page already stores data, selecting a third physical block from a free area, writing the update data into the third physical block, serving the third physical block as the child physical block of the first physical block, and executing an erasing operation on the second physical block, wherein the second physical block is currently a child physical block of the first physical block. Thereby, the method can effectively reduce the number of operations for merging data and increase the data writing speed.
    Type: Grant
    Filed: April 1, 2011
    Date of Patent: November 19, 2013
    Assignee: Phison Electronics Corp.
    Inventors: Kheng-Chong Tan, Lai-Hock Chua
  • Publication number: 20130254461
    Abstract: A data writing method for a memory storage device having physical unit unions is provided, wherein each of the physical unit unions includes upper physical units and lower physical units. The method includes partitioning the physical unit unions into a storage area including a data area and a spare area; configuring logical units for mapping to the physical unit unions of the data area; and receiving update data from a host system. The method also includes: selecting several physical unit unions from the spare area as buffer physical unit unions; writing the update data only to a part of each of the buffer physical unit unions; and moving the update data from buffer physical unit unions to the storage area by using a copy procedure. Therefore, the time of performing a write command can be shorten and the lifespan of the memory storage device can be prolonged effectively.
    Type: Application
    Filed: July 1, 2012
    Publication date: September 26, 2013
    Applicant: PHISON ELECTRONICS CORP.
    Inventors: Kheng-Chong Tan, Lai-Hock Chua
  • Patent number: 8510502
    Abstract: A data writing method, a memory controller using the method, and a memory storage apparatus using the method are provided. The method includes selecting a physical block as a reserved physical block for a plurality of updated physical blocks. The method also includes, when a host system is about to write updated data into a logical page belonging to a logical block and a physical page, which corresponds to the logical page, of a substitute physical block, which corresponds to an updated physical block mapped to the logical block, has stored data, independently assigning the reserved physical block to the updated physical block mapped to the logical block and writing the updated data into the reserved physical block. Accordingly, the method can complete data writing without performing a data merge operation, thereby shortening the time for performing a write command.
    Type: Grant
    Filed: December 14, 2011
    Date of Patent: August 13, 2013
    Assignee: Phison Electronics Corp.
    Inventors: Kheng-Chong Tan, Lai-Hock Chua
  • Publication number: 20130097362
    Abstract: A data writing method, a memory controller using the method, and a memory storage apparatus using the method are provided. The method includes selecting a physical block as a reserved physical block for a plurality of updated physical blocks. The method also includes, when a host system is about to write updated data into a logical page belonging to a logical block and a physical page, which corresponds to the logical page, of a substitute physical block, which corresponds to an updated physical block mapped to the logical block, has stored data, independently assigning the reserved physical block to the updated physical block mapped to the logical block and writing the updated data into the reserved physical block. Accordingly, the method can complete data writing without performing a data merge operation, thereby shortening the time for performing a write command.
    Type: Application
    Filed: December 14, 2011
    Publication date: April 18, 2013
    Applicant: PHISON ELECTRONICS CORP.
    Inventors: Kheng-Chong Tan, Lai-Hock Chua
  • Publication number: 20120198131
    Abstract: A data writing method for writing data into physical blocks of a memory storage apparatus, and a memory controller and a memory storage apparatus using the same are provided, the physical blocks are grouped into a plurality of physical units. The method includes switching the speed mode of the memory storage apparatus into a first speed mode or a second speed mode according to a command and a work frequency received from a host system. The method also includes selecting a first writing mode to write the data into the physical units when the speed mode is the first speed mode. The method further includes selecting a second writing mode to write the data into the physical units when the speed mode is the second speed mode. Accordingly, the method can effectively shorten the time of executing a write command from the host system.
    Type: Application
    Filed: April 27, 2011
    Publication date: August 2, 2012
    Applicant: PHISON ELECTRONICS CORP.
    Inventors: Kheng-Chong Tan, Lai-Hock Chua
  • Publication number: 20120166740
    Abstract: A data writing method for a rewritable non-volatile memory module is provided. The method includes receiving at least one update data, wherein the update data belongs to at least one logical page of a first logical block, and the first logical block is mapped to a first physical block. The method also includes when a physical page of a second physical block that is corresponding to the logical page already stores data, selecting a third physical block from a free area, writing the update data into the third physical block, serving the third physical block as the child physical block of the first physical block, and executing an erasing operation on the second physical block, wherein the second physical block is currently a child physical block of the first physical block. Thereby, the method can effectively reduce the number of operations for merging data and increase the data writing speed.
    Type: Application
    Filed: April 1, 2011
    Publication date: June 28, 2012
    Applicant: PHISON ELECTRONICS CORP.
    Inventors: Kheng-Chong Tan, Lai-Hock Chua
  • Publication number: 20110161565
    Abstract: A flash memory storage system having a flash memory controller and a flash memory chip is provided. The flash memory controller configures a second physical unit of the flash memory chip as a midway cache physical unit corresponding to a first physical unit and temporarily stores first data corresponding to a first host write command and second data corresponding to a second host write command in the midway cache physical unit, wherein the first and second data corresponding to slow physical addresses of the first physical unit. Then, the flash memory controller synchronously copies the first and second data from the midway cache physical unit into the first physical unit, thereby shortening time for writing data into the flash memory chip.
    Type: Application
    Filed: February 22, 2010
    Publication date: June 30, 2011
    Applicant: PHISON ELECTRONICS CORP.
    Inventors: Lai-Hock Chua, Kheng-Chong Tan