Patents by Inventor Lai Wei Chih
Lai Wei Chih has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 11984668Abstract: A device includes a patch antenna, which includes a feeding line, and a ground panel over the feeding line. The ground panel has an aperture therein. A low-k dielectric module is over and aligned to the aperture. A patch is over the low-k dielectric module.Type: GrantFiled: June 28, 2021Date of Patent: May 14, 2024Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.Inventors: Monsen Liu, Lai Wei Chih, Chung-Hao Tsai, Jeng-Shien Hsieh, En-Hsiang Yeh, Chuei-Tang Wang
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Publication number: 20240071947Abstract: A semiconductor package including a ring structure with one or more indents and a method of forming are provided. The semiconductor package may include a substrate, a first package component bonded to the substrate, wherein the first package component may include a first semiconductor die, a ring structure attached to the substrate, wherein the ring structure may encircle the first package component in a top view, and a lid structure attached to the ring structure. The ring structure may include a first segment, extending along a first edge of the substrate, and a second segment, extending along a second edge of the substrate. The first segment and the second segment may meet at a first corner of the ring structure, and a first indent of the ring structure may be disposed at the first corner of the ring structure.Type: ApplicationFiled: August 30, 2022Publication date: February 29, 2024Inventors: Yu-Ling Tsai, Lai Wei Chih, Meng-Tsan Lee, Hung-Pin Chang, Li-Han Hsu, Chien-Chia Chiu, Cheng-Hung Lin
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Patent number: 11532868Abstract: An antenna apparatus comprises a semiconductor die in a molding compound layer, a first through via is between a sidewall of the semiconductor die and a sidewall of the molding compound layer and an antenna structure over the molding compound layer, wherein a first portion of the antenna structure is directly over a top surface of the semiconductor die and a second portion of the antenna structure is directly over a top surface of the first through via.Type: GrantFiled: March 23, 2020Date of Patent: December 20, 2022Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.Inventors: Lai Wei Chih, Monsen Liu, En-Hsiang Yeh, Chuei-Tang Wang, Chen-Hua Yu
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Publication number: 20210328347Abstract: A device includes a patch antenna, which includes a feeding line, and a ground panel over the feeding line. The ground panel has an aperture therein. A low-k dielectric module is over and aligned to the aperture. A patch is over the low-k dielectric module.Type: ApplicationFiled: June 28, 2021Publication date: October 21, 2021Inventors: Monsen Liu, Lai Wei Chih, Chung-Hao Tsai, Jeng-Shien Hsieh, En-Hsiang Yeh, Chuei-Tang Wang
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Patent number: 11050153Abstract: A method includes placing a device die and a pre-formed dielectric block over a first carrier, encapsulating the device die and the pre-formed dielectric block in an encapsulating material, grinding a top side of the encapsulating material to expose the top side of the pre-formed dielectric block, removing the carrier from the encapsulating material, the pre-formed dielectric block, and the device die to reveal a bottom side of the pre-formed dielectric block, and forming a ground panel, a feeding line, and a patch on the encapsulating material. The ground panel, the feeding line, the patch, and the pre-formed dielectric block form a patch antenna.Type: GrantFiled: April 22, 2019Date of Patent: June 29, 2021Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.Inventors: Monsen Liu, Lai Wei Chih, Chung-Hao Tsai, Jeng-Shien Hsieh, En-Hsiang Yeh, Chuei-Tang Wang
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Publication number: 20200220250Abstract: An antenna apparatus comprises a semiconductor die in a molding compound layer, a first through via is between a sidewall of the semiconductor die and a sidewall of the molding compound layer and an antenna structure over the molding compound layer, wherein a first portion of the antenna structure is directly over a top surface of the semiconductor die and a second portion of the antenna structure is directly over a top surface of the first through via.Type: ApplicationFiled: March 23, 2020Publication date: July 9, 2020Inventors: Lai Wei Chih, Monsen Liu, En-Hsiang Yeh, Chuei-Tang Wang, Chen-Hua Yu
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Patent number: 10622701Abstract: An antenna apparatus comprises a semiconductor die in a molding compound layer, a first through via is between a sidewall of the semiconductor die and a sidewall of the molding compound layer and an antenna structure over the molding compound layer, wherein a first portion of the antenna structure is directly over a top surface of the semiconductor die and a second portion of the antenna structure is directly over a top surface of the first through via.Type: GrantFiled: April 20, 2018Date of Patent: April 14, 2020Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.Inventors: Lai Wei Chih, Monsen Liu, En-Hsiang Yeh, Chuei-Tang Wang, Chen-Hua Yu
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Patent number: 10504751Abstract: Package structures and methods of forming package structures are described. A method includes depositing and patterning a first dielectric material. The first dielectric material is deposited in first and second package component regions and in a scribe line region. The scribe line region is disposed between the first and second package component regions. The patterning the first dielectric material forms a first dielectric layer in each of the first and second package component regions and a dummy block in the scribe line region. The dummy block is separated from the first dielectric layer in each of the first and second package component regions. The method further includes forming a metallization pattern on the first dielectric layer; depositing a second dielectric material on the first dielectric layer and the metallization pattern; and patterning the second dielectric material to form a second dielectric layer.Type: GrantFiled: July 23, 2018Date of Patent: December 10, 2019Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.Inventors: Hsien-Wei Chen, Cheng-Hsien Hsieh, Li-Han Hsu, Lai Wei Chih
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Publication number: 20190252783Abstract: A device includes a patch antenna, which includes a feeding line, and a ground panel over the feeding line. The ground panel has an aperture therein. A low-k dielectric module is over and aligned to the aperture. A patch is over the low-k dielectric module.Type: ApplicationFiled: April 22, 2019Publication date: August 15, 2019Inventors: Monsen Liu, Lai Wei Chih, Chung-Hao Tsai, Jeng-Shien Hsieh, En-Hsiang Yeh, Chuei-Tang Wang
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Patent number: 10276401Abstract: A package includes a die, and a molding material molding the die therein. A metal shield case includes a first metal mesh over and contacting the molding material and the die, a second metal mesh underlying the die, and a Through-Assembly Via (TAV) in the molding material and forming a ring encircling the die. The TAV is electrically connected to the first metal mesh and the second metal mesh.Type: GrantFiled: May 9, 2016Date of Patent: April 30, 2019Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.Inventors: Monsen Liu, Chuei-Tang Wang, Lai Wei Chih, Chen-Hua Yu
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Patent number: 10270172Abstract: A device includes a patch antenna, which includes a feeding line, and a ground panel over the feeding line. The ground panel has an aperture therein. A low-k dielectric module is over and aligned to the aperture. A patch is over the low-k dielectric module.Type: GrantFiled: January 8, 2016Date of Patent: April 23, 2019Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.Inventors: Monsen Liu, Lai Wei Chih, Chung-Hao Tsai, Jeng-Shien Hsieh, En-Hsiang Yeh, Chuei-Tang Wang
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Publication number: 20180330969Abstract: Package structures and methods of forming package structures are described. A method includes depositing and patterning a first dielectric material. The first dielectric material is deposited in first and second package component regions and in a scribe line region. The scribe line region is disposed between the first and second package component regions. The patterning the first dielectric material forms a first dielectric layer in each of the first and second package component regions and a dummy block in the scribe line region. The dummy block is separated from the first dielectric layer in each of the first and second package component regions. The method further includes forming a metallization pattern on the first dielectric layer; depositing a second dielectric material on the first dielectric layer and the metallization pattern; and patterning the second dielectric material to form a second dielectric layer.Type: ApplicationFiled: July 23, 2018Publication date: November 15, 2018Inventors: Hsien-Wei Chen, Cheng-Hsien Hsieh, Li-Han Hsu, Lai Wei Chih
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Publication number: 20180241114Abstract: An antenna apparatus comprises a semiconductor die in a molding compound layer, a first through via is between a sidewall of the semiconductor die and a sidewall of the molding compound layer and an antenna structure over the molding compound layer, wherein a first portion of the antenna structure is directly over a top surface of the semiconductor die and a second portion of the antenna structure is directly over a top surface of the first through via.Type: ApplicationFiled: April 20, 2018Publication date: August 23, 2018Inventors: Lai Wei Chih, Monsen Liu, En-Hsiang Yeh, Chuei-Tang Wang, Chen-Hua Yu
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Patent number: 10032651Abstract: Package structures and methods of forming package structures are described. A method includes depositing and patterning a first dielectric material. The first dielectric material is deposited in first and second package component regions and in a scribe line region. The scribe line region is disposed between the first and second package component regions. The patterning the first dielectric material forms a first dielectric layer in each of the first and second package component regions and a dummy block in the scribe line region. The dummy block is separated from the first dielectric layer in each of the first and second package component regions. The method further includes forming a metallization pattern on the first dielectric layer; depositing a second dielectric material on the first dielectric layer and the metallization pattern; and patterning the second dielectric material to form a second dielectric layer.Type: GrantFiled: April 16, 2015Date of Patent: July 24, 2018Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.Inventors: Hsien-Wei Chen, Cheng-Hsien Hsieh, Li-Han Hsu, Lai Wei Chih
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Patent number: 9985336Abstract: An antenna apparatus comprises a semiconductor die embedded in and adjacent to a first side of a molding compound layer, a plurality of first interconnects formed on the first side of the molding compound layer, wherein the plurality of first interconnects are electrically connected the semiconductor die and an antenna structure formed on a second side of the molding compound layer, wherein the antenna structure is electrically connected to the semiconductor die through a via connected between the plurality of first interconnects and the antenna structure.Type: GrantFiled: August 16, 2016Date of Patent: May 29, 2018Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.Inventors: Lai Wei Chih, Monsen Liu, En-Hsiang Yeh, Chuei-Tang Wang, Chen-Hua Yu
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Publication number: 20160359221Abstract: An antenna apparatus comprises a semiconductor die embedded in and adjacent to a first side of a molding compound layer, a plurality of first interconnects formed on the first side of the molding compound layer, wherein the plurality of first interconnects are electrically connected the semiconductor die and an antenna structure formed on a second side of the molding compound layer, wherein the antenna structure is electrically connected to the semiconductor die through a via connected between the plurality of first interconnects and the antenna structure.Type: ApplicationFiled: August 16, 2016Publication date: December 8, 2016Inventors: Lai Wei Chih, Monsen Liu, En-Hsiang Yeh, Chuei-Tang Wang, Chen-Hua Yu
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Publication number: 20160254168Abstract: A package includes a die, and a molding material molding the die therein. A metal shield case includes a first metal mesh over and contacting the molding material and the die, a second metal mesh underlying the die, and a Through-Assembly Via (TAV) in the molding material and forming a ring encircling the die. The TAV is electrically connected to the first metal mesh and the second metal mesh.Type: ApplicationFiled: May 9, 2016Publication date: September 1, 2016Inventors: Monsen Liu, Chuei-Tang Wang, Lai Wei Chih, Chen-Hua Yu
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Patent number: 9431369Abstract: An antenna apparatus comprises a semiconductor die comprising a plurality of active circuits, a molding layer formed over the semiconductor die, wherein the semiconductor die and the molding layer form a fan-out package, a first dielectric layer formed on a first side of the semiconductor die over the molding compound layer, a first redistribution layer formed in the first dielectric layer and an antenna structure formed above the semiconductor die and coupled to the plurality of active circuits through the first redistribution layer.Type: GrantFiled: December 13, 2012Date of Patent: August 30, 2016Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.Inventors: Lai Wei Chih, Monsen Liu, En-Hsiang Yeh, Chuei-Tang Wang, Chen-Hua Yu
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Publication number: 20160240391Abstract: Package structures and methods of forming package structures are described. A method includes depositing and patterning a first dielectric material. The first dielectric material is deposited in first and second package component regions and in a scribe line region. The scribe line region is disposed between the first and second package component regions. The patterning the first dielectric material forms a first dielectric layer in each of the first and second package component regions and a dummy block in the scribe line region. The dummy block is separated from the first dielectric layer in each of the first and second package component regions. The method further includes forming a metallization pattern on the first dielectric layer; depositing a second dielectric material on the first dielectric layer and the metallization pattern; and patterning the second dielectric material to form a second dielectric layer.Type: ApplicationFiled: April 16, 2015Publication date: August 18, 2016Inventors: Hsien-Wei Chen, Cheng-Hsien Hsieh, Li-Han Hsu, Lai Wei Chih
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Patent number: 9391350Abstract: Among other things, one or more techniques and systems for selectively filtering RF signals within one or more RF frequency band are provided. In particular, an RF choke, such as a 3D RF choke or a semi-lumped RF choke, configured to selectively filter such RF signals is provided. The RF choke comprises a metal connection line configured as an inductive element for the RF choke. In an example, one or more metal lines, such as a metal open stub, are formed as capacitive elements for the RF choke. In another example, one or more through vias are formed as capacitive elements for the RF choke. In this way, the RF choke allows DC power signals to pass through the metal connection line, while impeding RF signals within the one or more RF frequency bands from passing through the metal connection line.Type: GrantFiled: March 7, 2013Date of Patent: July 12, 2016Assignee: Taiwan Semiconductor Manufacturing Company LimitedInventors: Jeng-Shien Hsieh, Monsen Liu, Chung-Hao Tsai, Lai Wei Chih, Yeh En-Hsiang, Chuei-Tang Wang, Chen-Hua Yu