Patents by Inventor Lakshmanan H. VANAMURTHY

Lakshmanan H. VANAMURTHY has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20180233505
    Abstract: A method for forming a self-aligned sacrificial epitaxial cap for trench silicide and the resulting device are provided. Embodiments include a Si fin formed in a PFET region; a pair of Si fins formed in a NFET region; epitaxial S/D regions formed on ends of the Si fins; a replacement metal gate formed over the Si fins in the PFET and NFET regions; metal silicide trenches formed over the epitaxial S/D regions in the PFET and NEFT regions; a metal layer formed over top surfaces of the S/D region in the PFET region and top and bottom surfaces of the S/D regions in the NFET region, wherein the epitaxial S/D regions in the PFET and NFET regions are diamond shaped in cross-sectional view.
    Type: Application
    Filed: September 28, 2017
    Publication date: August 16, 2018
    Inventors: George R. MULFINGER, Lakshmanan H. VANAMURTHY, Scott BEASOR, Timothy J. MCARDLE, Judson R. HOLT, Hao ZHANG
  • Publication number: 20150214330
    Abstract: A method includes providing a gate structure having a gate, a first spacer along at least one side of the gate and an interlayer dielectric on at least one of the gate and the first spacer. The interlayer dielectric is removed to reveal the first spacer. The first spacer is removed and a second spacer is deposited on at least one side of the gate. The second spacer is formed of material having a lower dielectric constant than the first spacer.
    Type: Application
    Filed: January 24, 2014
    Publication date: July 30, 2015
    Applicant: GLOBALFOUNDRIES Inc.
    Inventors: Jing WAN, Jin Ping LIU, Guillaume BOUCHE, Andy WEI, Lakshmanan H. VANAMURTHY, Cuiqin XU, Sridhar KUCHIBHATLA, Rama KAMBHAMPATI, Xiuyu CAI