Patents by Inventor Lal Mohan BHOWMIK

Lal Mohan BHOWMIK has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Cavity resonance suppression using discrete thermal pedestals in active electronically scanned array
    Patent number: 12126069
    Abstract: An AESA (Active Electronically Scanned Array), including: a PCB (Printed Circuit Board) substrate having an obverse surface; TRMs (Transmit/Receive Modules) disposed on the obverse surface; thermal pedestals wherein each thermal pedestal includes a wall, having a wall height, including wall surfaces and one of the wall surfaces being a contact surface; and a TIM (Thermal Interface Material), having a TIM height, disposed between a respective contact surface of the thermal pedestals and the obverse surface. The thermal pedestals are discrete with respect to one another, the contact surfaces of the thermal pedestals are interspersed about the TRMs, the thermal pedestals do not contact the TRMs, the TIM is electrically and thermally conductive, and the wall height plus the TIM height is sufficient to suppress resonances of the TRMs below a frequency greater than the Tx and Rx frequency bands of the TRMs.
    Type: Grant
    Filed: March 30, 2022
    Date of Patent: October 22, 2024
    Assignee: Hughes Network Systems, LLC
    Inventors: Michael Buckley, Tom Walter, Bingqian Lu, Lal Mohan Bhowmik, Varada Rajan Komanduri
  • Cavity resonance suppression using thermal pedestal arrangements in active electronically scanned array
    Patent number: 12080936
    Abstract: An AESA (Active Electronically Scanned Array), including: a PCB (Printed Circuit Board) substrate having an obverse surface; TRMs (Transmit/Receive Modules) disposed on the obverse surface; thermal pedestals wherein each thermal pedestal includes a wall, having a wall height, including wall surfaces and one of the wall surfaces being a contact surface; and a TIM (Thermal Interface Material), having a TIM height, disposed between a respective contact surface of the thermal pedestals and the obverse surface. A plurality of the thermal pedestals are physically interconnected, the TIM is electrically and thermally conductive, and the wall height plus the TIM height is sufficient to suppress resonances of the TRMs below a frequency greater than a Tx and Rx frequency band of the TRMs.
    Type: Grant
    Filed: March 30, 2022
    Date of Patent: September 3, 2024
    Assignee: Hughes Network Systems, LLC
    Inventors: Michael Buckley, Tom Walter, Lal Mohan Bhowmik, Varada Rajan Komanduri
  • Cavity Resonance Suppression Using Discrete Thermal Pedestals in Active Electronically Scanned Array
    Publication number: 20220321239
    Abstract: An AESA (Active Electronically Scanned Array), including: a PCB (Printed Circuit Board) substrate having an obverse surface; TRMs (Transmit/Receive Modules) disposed on the obverse surface; thermal pedestals wherein each thermal pedestal includes a wall, having a wall height, including wall surfaces and one of the wall surfaces being a contact surface; and a TIM (Thermal Interface Material), having a TIM height, disposed between a respective contact surface of the thermal pedestals and the obverse surface. The thermal pedestals are discrete with respect to one another, the contact surfaces of the thermal pedestals are interspersed about the TRMs, the thermal pedestals do not contact the TRMs, the TIM is electrically and thermally conductive, and the wall height plus the TIM height is sufficient to suppress resonances of the TRMs below a frequency greater than the Tx and Rx frequency bands of the TRMs.
    Type: Application
    Filed: March 30, 2022
    Publication date: October 6, 2022
    Applicant: Hughes Network Systems, LLC
    Inventors: Michael BUCKLEY, Tom WALTER, Bingqian LU, Lal Mohan BHOWMIK, Varada Rajan KOMANDURI
  • Cavity Resonance Suppression Using Thermal Pedestal Arrangements in Active Electronically Scanned Array
    Publication number: 20220320705
    Abstract: An AESA (Active Electronically Scanned Array), including: a PCB (Printed Circuit Board) substrate having an obverse surface; TRMs (Transmit/Receive Modules) disposed on the obverse surface; thermal pedestals wherein each thermal pedestal includes a wall, having a wall height, including wall surfaces and one of the wall surfaces being a contact surface; and a TIM (Thermal Interface Material), having a TIM height, disposed between a respective contact surface of the thermal pedestals and the obverse surface. A plurality of the thermal pedestals are physically interconnected, the TIM is electrically and thermally conductive, and the wall height plus the TIM height is sufficient to suppress resonances of the TRMs below a frequency greater than a Tx and Rx frequency band of the TRMs.
    Type: Application
    Filed: March 30, 2022
    Publication date: October 6, 2022
    Applicant: Hughes Network Systems, LLC
    Inventors: Michael BUCKLEY, Tom WALTER, Lal Mohan BHOWMIK, Varada Rajan KOMANDURI