Patents by Inventor Lalgudi M. Mahalingam

Lalgudi M. Mahalingam has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Methods for bonding a die and a substrate
    Patent number: 9111901
    Abstract: Embodiments of methods for forming a semiconductor device that includes a die and a substrate include pressing together the die and the substrate such that a first gold layer and one or more additional material layers are between the die and the substrate, and performing a bonding operation to form a die attach layer between the die and the substrate. The die attach layer includes a gold interface layer that includes gold and a plurality of first precipitates in the gold. Each of the first precipitates includes a combination of nickel, cobalt, palladium, gold, and silicon.
    Type: Grant
    Filed: May 26, 2014
    Date of Patent: August 18, 2015
    Assignee: Freescale Semiconductor, Inc.
    Inventors: Jin-Wook Jang, Lalgudi M. Mahalingam, Audel A. Sanchez, Lakshminarayan Viswanathan
  • Semiconductor devices that include a die bonded to a substrate with a gold interface layer
    Patent number: 9105599
    Abstract: Embodiments of a semiconductor device include a primary portion of a substrate, a die, and a die attach layer between the die and the primary portion of the substrate. The die attach layer includes a gold interface layer that includes gold and a plurality of first precipitates in the gold. Each of the first precipitates includes a combination of nickel, cobalt, palladium, gold, and silicon.
    Type: Grant
    Filed: May 26, 2014
    Date of Patent: August 11, 2015
    Assignee: Freescale Semiconductor, Inc.
    Inventors: Jin-Wook Jang, Lalgudi M. Mahalingam, Audel A. Sanchez, Lakshminarayan Viswanathan
  • SEMICONDUCTOR DEVICES THAT INCLUDE A DIE BONDED TO A SUBSTRATE WITH A GOLD INTERFACE LAYER
    Publication number: 20140252586
    Abstract: Embodiments of a semiconductor device include a primary portion of a substrate, a die, and a die attach layer between the die and the primary portion of the substrate. The die attach layer includes a gold interface layer that includes gold and a plurality of first precipitates in the gold. Each of the first precipitates includes a combination of nickel, cobalt, palladium, gold, and silicon.
    Type: Application
    Filed: May 26, 2014
    Publication date: September 11, 2014
    Applicant: FREESCALE SEMICONDUCTOR, INC.
    Inventors: JIN-WOOK JANG, LALGUDI M. MAHALINGAM, AUDEL A. SANCHEZ, LAKSHMINARAYAN VISWANATHAN
  • METHODS FOR BONDING A DIE AND A SUBSTRATE
    Publication number: 20140256091
    Abstract: Embodiments of methods for forming a semiconductor device that includes a die and a substrate include pressing together the die and the substrate such that a first gold layer and one or more additional material layers are between the die and the substrate, and performing a bonding operation to form a die attach layer between the die and the substrate. The die attach layer includes a gold interface layer that includes gold and a plurality of first precipitates in the gold. Each of the first precipitates includes a combination of nickel, cobalt, palladium, gold, and silicon.
    Type: Application
    Filed: May 26, 2014
    Publication date: September 11, 2014
    Applicant: FREESCALE SEMICONDUCTOR, INC.
    Inventors: JIN-WOOK JANG, LALGUDI M. MAHALINGAM, AUDEL A. SANCHEZ, LAKSHMINARAYAN VISWANATHAN
  • Die bonding a semiconductor device
    Patent number: 8753983
    Abstract: A method includes providing a silicon-containing die and providing a heat sink having a palladium layer over a first surface of the heat sink. A first gold layer is located over one of a first surface of the die or the palladium layer. The silicon-containing die is bonded to the heat sink, where bonding includes joining the silicon-containing die and the heat sink such that the first gold layer and the palladium layer are between the first surface of the silicon-containing die and the first surface of the heat sink, and heating the first gold layer and the palladium layer to form a die attach layer between the first surface of the silicon-containing die and the first surface of the heat sink, the die attach layer comprising a gold interface layer having a plurality of intermetallic precipitates, each of the plurality of intermetallic precipitates comprising palladium, gold, and silicon.
    Type: Grant
    Filed: January 7, 2010
    Date of Patent: June 17, 2014
    Assignee: Freescale Semiconductor, Inc.
    Inventors: Jin-Wook Jang, Lalgudi M. Mahalingam, Audel A. Sanchez, Lakshminarayan Viswanathan
  • DIE BONDING A SEMICONDUCTOR DEVICE
    Publication number: 20110163439
    Abstract: A method includes providing a silicon-containing die and providing a heat sink having a palladium layer over a first surface of the heat sink. A first gold layer is located over one of a first surface of the die or the palladium layer. The silicon-containing die is bonded to the heat sink, where bonding includes joining the silicon-containing die and the heat sink such that the first gold layer and the palladium layer are between the first surface of the silicon-containing die and the first surface of the heat sink, and heating the first gold layer and the palladium layer to form a die attach layer between the first surface of the silicon-containing die and the first surface of the heat sink, the die attach layer comprising a gold interface layer having a plurality of intermetallic precipitates, each of the plurality of intermetallic precipitates comprising palladium, gold, and silicon.
    Type: Application
    Filed: January 7, 2010
    Publication date: July 7, 2011
    Inventors: Jin-Wook Jang, Lalgudi M. Mahalingam, Audel A. Sanchez, Lakshminarayan Viswanathan