Patents by Inventor Lalit Mohan

Lalit Mohan has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20250072671
    Abstract: This invention relates to a medical equipment for simultaneous diagnostic of various vital parameters of human body comprising a seating means installed with a plurality of sensors to measure various vital human body parameters, which is provided in communication with a control unit to transmit user related data to a monitoring unit. It is associated with the following advantageous features: Simultaneous diagnostic of various vital parameters of human body, hence less time consuming. Compact and therefore portable. Cost effective.
    Type: Application
    Filed: December 14, 2021
    Publication date: March 6, 2025
    Inventor: Lalit Mohan SHARMA
  • Patent number: 11966904
    Abstract: A computer system includes one or more processors and machine readable storage media coupled to the one or more processors having instructions stored therein that cause the computer system to: receive a payment request packet from an Internet of Things (IoT) device; extract a signature of the payment request packet that includes metadata; identify a firmware update status from the metadata of the signature; determine that the IoT device has a first version of the firmware installed on the IoT device based on the firmware update status; cause a second version of the firmware to be installed on the IoT device in response to determining the IoT device has the first version of the firmware; and initiate a transaction based on the payment request packet responsive to the second version of the firmware being installed on the IoT device.
    Type: Grant
    Filed: April 18, 2022
    Date of Patent: April 23, 2024
    Assignee: Wells Fargo Bank, N.A.
    Inventors: Lalit Mohan Sanagavarapu, Kamal Gaur, Kunal Chaubey
  • Patent number: 11498476
    Abstract: The present disclosure described herein, in general, relates to a system 500 for controlling headlamps of a vehicle. The system 500 may comprise a signal processing unit 509, a relay circuit 401, a switch 302 and a user device 407. The user device 407 comprises a GPS tracker 408-A, an output unit 409, a processor 408-B and a memory 408-C. The system comprises comparing one or more parameters with the predefined threshold value, notifying information based upon the one or more parameters, instructing the user to change the status of the headlamp using the switch 302 based upon the comparison of the one or more parameters with the predefined threshold value and controlling the status of the headlamps upon receiving command by the user based upon the instructions or automatically operating the relay circuit 401 based upon the received signals.
    Type: Grant
    Filed: February 14, 2020
    Date of Patent: November 15, 2022
    Assignee: Saint Sita Ram Innovation Lab Private Ltd
    Inventors: Lalit Mohan, Sabita Sharma
  • Patent number: 11489859
    Abstract: A system and method for retrieving and extracting security information is provided. The method includes (i) extracting seed Uniform Resource Locators (URLs) from social media based on keywords that are identified for each sub-domain, (ii) crawling a security related content in the extracted seed URLs to determine relevant URLs that are related to a security domain from the extracted seed URLs, (iii) classifying the security related content into sub-domains of security to obtain domain coverage, (iv) extracting text that include acronyms from the relevant URLs, (v) automatically evolving a security ontology based on extracted text using a Long Short-Term Memory (LSTM) deep Learning model, (vi) ranking search results by accessing credibility of the URLs that include the security related content based on domain relevance and (vii) providing the ranked search results that includes trends.
    Type: Grant
    Filed: May 23, 2019
    Date of Patent: November 1, 2022
    Inventors: Y Raghu Babu Reddy, Lalit Mohan Sanagavarapu, Vasudeva Varma
  • Patent number: 11481150
    Abstract: Aspects of a storage device are provided which reduce write amplification by minimizing data flushes from cache to SLC blocks during RMW operations. A memory of the storage device includes a first memory location of one or more single-level cells and a second memory location of one or more multiple-level cells. A controller of the storage device receives first data associated with a first range of logical addresses and second data associated with a second range of logical addresses. During a RMW operation of the first data, the controller determines whether the first range overlaps with the second range, and stores or flushes the second data in the first memory location when an overlap is determined. The controller stores or writes the second data in the second memory location when an overlap is not determined. Accordingly, data flushing to the single-level cells is minimized when no overlap is determined.
    Type: Grant
    Filed: April 1, 2020
    Date of Patent: October 25, 2022
    Assignee: WESTERN DIGITAL TECHNOLOGIES, INC.
    Inventors: Vishwas Saxena, Lalit Mohan Soni
  • Publication number: 20210311660
    Abstract: Aspects of a storage device are provided which reduce write amplification by minimizing data flushes from cache to SLC blocks during RMW operations. A memory of the storage device includes a first memory location of one or more single-level cells and a second memory location of one or more multiple-level cells. A controller of the storage device receives first data associated with a first range of logical addresses and second data associated with a second range of logical addresses. During a RMW operation of the first data, the controller determines whether the first range overlaps with the second range, and stores or flushes the second data in the first memory location when an overlap is determined. The controller stores or writes the second data in the second memory location when an overlap is not determined. Accordingly, data flushing to the single-level cells is minimized when no overlap is determined.
    Type: Application
    Filed: April 1, 2020
    Publication date: October 7, 2021
    Inventors: Vishwas Saxena, Lalit Mohan Soni
  • Patent number: 11036435
    Abstract: Aspects of a storage device include a memory comprising a plurality of memory locations each associated with a physical address, the memory configured to store a plurality of video frames received from a host device at the physical addresses, each of the video frames being associated with a logical address; and a controller configured to store in a partition of the memory the logical addresses for a subset of the video frames, the controller being configured to provide the host access to the partition to read the logical addresses during rapid playback of the video frames. Aspects of the host device include a processor configured to write the video frames to the storage device, to identify the subset of the video frames to the storage device, and during rapid playback, to access the storage device to read the logical address for each video frame in the subset.
    Type: Grant
    Filed: August 30, 2019
    Date of Patent: June 15, 2021
    Assignee: WESTERN DIGITAL TECHNOLOGIES, INC.
    Inventors: Sridhar Prudvi Raj Gunda, Lalit Mohan Soni
  • Publication number: 20210064280
    Abstract: Aspects of a storage device include a memory comprising a plurality of memory locations each associated with a physical address, the memory configured to store a plurality of video frames received from a host device at the physical addresses, each of the video frames being associated with a logical address; and a controller configured to store in a partition of the memory the logical addresses for a subset of the video frames, the controller being configured to provide the host access to the partition to read the logical addresses during rapid playback of the video frames. Aspects of the host device include a processor configured to write the video frames to the storage device, to identify the subset of the video frames to the storage device, and during rapid playback, to access the storage device to read the logical address for each video frame in the subset.
    Type: Application
    Filed: August 30, 2019
    Publication date: March 4, 2021
    Inventors: Sridhar Prudvi Raj Gunda, Lalit Mohan Soni
  • Patent number: 10894548
    Abstract: The present subject matter relates to a vehicle mileage optimization system (300) for optimizing mileage of a vehicle by informing user about correct gear and speed combination. The vehicle mileage optimization system (300) has a speed and fuel measuring module (305) coupled with a processor (301) to collect speed and fuel data of the vehicle. Further, the vehicle mileage optimization system has a mileage and distance estimation module (306) coupled with the processor (301) to estimate fuel efficiency and correct gear and speed combination in the vehicle based on the collected speed and fuel data.
    Type: Grant
    Filed: October 25, 2018
    Date of Patent: January 19, 2021
    Assignee: SAINT SITA RAM INNOVATION LAB PRIVATE LIMITED
    Inventors: Lalit Mohan, Rahul Jindal
  • Patent number: 10838629
    Abstract: After an ungraceful shutdown (UGSD) event, a data storage apparatus restores a fast boot-up table from a copy stored in a non-volatile memory (NVM), and receives a first read command from a host. The first read command includes a request to read data from a logical block address (LBA). The apparatus maintains a fast boot-up table that includes a plurality of entries, and each entry includes an LBA and an associated physical block address of the NVM. If the LBA is contained in the fast boot-up table, the apparatus determines a first physical block address associated with the LBA using the fast boot-up table. The apparatus reads data from the NVM at the first physical block address, prior to completing an initialization process of the data storage apparatus, and transmits the data read from the NVM to the host.
    Type: Grant
    Filed: September 24, 2018
    Date of Patent: November 17, 2020
    Assignee: WESTERN DIGITAL TECHNOLOGIES, INC.
    Inventors: Sridhar Prudvi Raj Gunda, Lalit Mohan Soni, Vijaya Janarthanam, Judah Gamliel Hahn
  • Publication number: 20200180500
    Abstract: The present disclosure described herein, in general, relates to a system 500 for controlling headlamps of a vehicle. The system 500 may comprise a signal processing unit 509, a relay circuit 401, a switch 302 and a user device 407. The user device 407 comprises a GPS tracker 408-A, an output unit 409, a processor 408-B and a memory 408-C. The system comprises comparing one or more parameters with the predefined threshold value, notifying information based upon the one or more parameters, instructing the user to change the status of the headlamp using the switch 302 based upon the comparison of the one or more parameters with the predefined threshold value and controlling the status of the headlamps upon receiving command by the user based upon the instructions or automatically operating the relay circuit 401 based upon the received signals.
    Type: Application
    Filed: February 14, 2020
    Publication date: June 11, 2020
    Inventors: Lalit Mohan, Sabita Sharma
  • Publication number: 20200097188
    Abstract: After an ungraceful shutdown (UGSD) event, a data storage apparatus restores a fast boot-up table from a copy stored in a non-volatile memory (NVM), and receives a first read command from a host. The first read command includes a request to read data from a logical block address (LBA). The apparatus maintains a fast boot-up table that includes a plurality of entries, and each entry includes an LBA and an associated physical block address of the NVM. If the LBA is contained in the fast boot-up table, the apparatus determines a first physical block address associated with the LBA using the fast boot-up table. The apparatus reads data from the NVM at the first physical block address, prior to completing an initialization process of the data storage apparatus, and transmits the data read from the NVM to the host.
    Type: Application
    Filed: September 24, 2018
    Publication date: March 26, 2020
    Inventors: Sridhar Prudvi Raj Gunda, Lalit Mohan Soni, Vijaya Janarthanam, Judah Gamliel Hahn
  • Publication number: 20190364068
    Abstract: A system and method for retrieving and extracting security information is provided. The method includes (i) extracting seed Uniform Resource Locators (URLs) from social media based on keywords that are identified for each sub-domain, (ii) crawling a security related content in the extracted seed URLs to determine relevant URLs that are related to a security domain from the extracted seed URLs, (iii) classifying the security related content into sub-domains of security to obtain domain coverage, (iv) extracting text that include acronyms from the relevant URLs, (v) automatically evolving a security ontology based on extracted text using a Long Short-Term Memory (LSTM) deep Learning model, (vi) ranking search results by accessing credibility of the URLs that include the security related content based on domain relevance and (vii) providing the ranked search results that includes trends.
    Type: Application
    Filed: May 23, 2019
    Publication date: November 28, 2019
    Inventors: Y Raghu Babu Reddy, Lalit Mohan Sanagavarapu, Vasudeva Varma
  • Publication number: 20190061779
    Abstract: The present subject matter relates to a vehicle mileage optimization system (300) for optimizing mileage of a vehicle by informing user about correct gear and speed combination. The vehicle mileage optimization system (300) has a speed and fuel measuring module (305) coupled with a processor (301) to collect speed and fuel data of the vehicle. Further, the vehicle mileage optimization system has a mileage and distance estimation module (306) coupled with the processor (301) to estimate fuel efficiency and correct gear and speed combination in the vehicle based on the collected speed and fuel data.
    Type: Application
    Filed: October 25, 2018
    Publication date: February 28, 2019
    Inventors: Lalit Mohan, Rahul Jindal
  • Patent number: 9270174
    Abstract: An integrated circuit includes a set of electronic circuits, a voltage regulator, and a power management module. The power management module includes a set of dummy circuits connected to the set of electronic circuits, a control signal generator, a counter and a shift register. The control signal generator generates a control signal based on the current consumption of the set of electronic circuits dropping below a threshold value over a predefined period of time. The counter generates a count signal for a predetermined time period when the control signal is activated. The shift register receives the count signal, enables the dummy circuits when the count signal is received, and disables the dummy circuits in a daisy chain fashion during the predetermined time period.
    Type: Grant
    Filed: May 12, 2013
    Date of Patent: February 23, 2016
    Assignee: FREESCALE SEMICONDUCTOR, INC.
    Inventors: Lalit Mohan Singh Miyan, Kumar Abhishek, Nitin Singh
  • Publication number: 20140333133
    Abstract: An integrated circuit includes a set of electronic circuits, a voltage regulator, and a power management module. The power management module includes a set of dummy circuits connected to the set of electronic circuits, a control signal generator, a counter and a shift register. The control signal generator generates a control signal based on the current consumption of the set of electronic circuits dropping below a threshold value over a predefined period of time. The counter generates a count signal for a predetermined time period when the control signal is activated. The shift register receives the count signal, enables the dummy circuits when the count signal is received, and disables the dummy circuits in a daisy chain fashion during the predetermined time period.
    Type: Application
    Filed: May 12, 2013
    Publication date: November 13, 2014
    Inventors: Lalit Mohan Singh Miyan, Kumar Abhishek, Nitin Singh