Abstract: Aspects of a storage device are provided which reduce write amplification by minimizing data flushes from cache to SLC blocks during RMW operations. A memory of the storage device includes a first memory location of one or more single-level cells and a second memory location of one or more multiple-level cells. A controller of the storage device receives first data associated with a first range of logical addresses and second data associated with a second range of logical addresses. During a RMW operation of the first data, the controller determines whether the first range overlaps with the second range, and stores or flushes the second data in the first memory location when an overlap is determined. The controller stores or writes the second data in the second memory location when an overlap is not determined. Accordingly, data flushing to the single-level cells is minimized when no overlap is determined.

Abstract: Aspects of a storage device are provided which reduce write amplification by minimizing data flushes from cache to SLC blocks during RMW operations. A memory of the storage device includes a first memory location of one or more single-level cells and a second memory location of one or more multiple-level cells. A controller of the storage device receives first data associated with a first range of logical addresses and second data associated with a second range of logical addresses. During a RMW operation of the first data, the controller determines whether the first range overlaps with the second range, and stores or flushes the second data in the first memory location when an overlap is determined. The controller stores or writes the second data in the second memory location when an overlap is not determined. Accordingly, data flushing to the single-level cells is minimized when no overlap is determined.

Abstract: Aspects of a storage device include a memory comprising a plurality of memory locations each associated with a physical address, the memory configured to store a plurality of video frames received from a host device at the physical addresses, each of the video frames being associated with a logical address; and a controller configured to store in a partition of the memory the logical addresses for a subset of the video frames, the controller being configured to provide the host access to the partition to read the logical addresses during rapid playback of the video frames. Aspects of the host device include a processor configured to write the video frames to the storage device, to identify the subset of the video frames to the storage device, and during rapid playback, to access the storage device to read the logical address for each video frame in the subset.

Abstract: Aspects of a storage device include a memory comprising a plurality of memory locations each associated with a physical address, the memory configured to store a plurality of video frames received from a host device at the physical addresses, each of the video frames being associated with a logical address; and a controller configured to store in a partition of the memory the logical addresses for a subset of the video frames, the controller being configured to provide the host access to the partition to read the logical addresses during rapid playback of the video frames. Aspects of the host device include a processor configured to write the video frames to the storage device, to identify the subset of the video frames to the storage device, and during rapid playback, to access the storage device to read the logical address for each video frame in the subset.

Abstract: After an ungraceful shutdown (UGSD) event, a data storage apparatus restores a fast boot-up table from a copy stored in a non-volatile memory (NVM), and receives a first read command from a host. The first read command includes a request to read data from a logical block address (LBA). The apparatus maintains a fast boot-up table that includes a plurality of entries, and each entry includes an LBA and an associated physical block address of the NVM. If the LBA is contained in the fast boot-up table, the apparatus determines a first physical block address associated with the LBA using the fast boot-up table. The apparatus reads data from the NVM at the first physical block address, prior to completing an initialization process of the data storage apparatus, and transmits the data read from the NVM to the host.

Abstract: After an ungraceful shutdown (UGSD) event, a data storage apparatus restores a fast boot-up table from a copy stored in a non-volatile memory (NVM), and receives a first read command from a host. The first read command includes a request to read data from a logical block address (LBA). The apparatus maintains a fast boot-up table that includes a plurality of entries, and each entry includes an LBA and an associated physical block address of the NVM. If the LBA is contained in the fast boot-up table, the apparatus determines a first physical block address associated with the LBA using the fast boot-up table. The apparatus reads data from the NVM at the first physical block address, prior to completing an initialization process of the data storage apparatus, and transmits the data read from the NVM to the host.