Patents by Inventor Lalita M. Satapathy

Lalita M. Satapathy has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Methods for designing integrated circuits employing context-sensitive and progressive rules and an apparatus employing one of the methods
    Patent number: 8127264
    Abstract: Methods of designing an IC and an apparatus are disclosed. In one embodiment, a method includes: (1) creating a functional circuit for a functional block of an IC design, (2) verifying said functional circuit satisfies a rule-set for said IC design, wherein said rule-set is context-based with respect to said design flow, (3) synthesizing a logical circuit based on the functional circuit; (4) verifying the logical circuit satisfies the rule set; (5) implementing a physical layout of the logical circuit; and (6) verifying the physical layout satisfies the rule set, wherein each step of the method is carried out by at least one EDA tool.
    Type: Grant
    Filed: July 27, 2009
    Date of Patent: February 28, 2012
    Assignee: LSI Corporation
    Inventors: James C. Parker, Vishwas M. Rao, Lalita M. Satapathy, Todd M. Tope
  • METHODS FOR DESIGNING INTEGRATED CIRCUITS EMPLOYING CONTEXT-SENSITIVE AND PROGRESSIVE RULES AND AN APPARATUS EMPLOYING ONE OF THE METHODS
    Publication number: 20110022996
    Abstract: Methods of designing an IC and an apparatus are disclosed. In one embodiment, a method includes: (1) creating a functional circuit for a functional block of an IC design, (2) verifying said functional circuit satisfies a rule-set for said IC design, wherein said rule-set is context-based with respect to said design flow, (3) synthesizing a logical circuit based on the functional circuit; (4) verifying the logical circuit satisfies the rule set; (5) implementing a physical layout of the logical circuit; and (6) verifying the physical layout satisfies the rule set, wherein each step of the method is carried out by at least one EDA tool.
    Type: Application
    Filed: July 27, 2009
    Publication date: January 27, 2011
    Inventors: James C. Parker, Vishwas M. Rao, Lalita M. Satapathy, Todd M. Tope