Abstract: A current-mode controlled power converter (1) comprises a controllable switch (S3) which is coupled to an inductor (L1) to obtain a periodical current (I1) through the inductor (L1). A current feedback loop (2, 3, 4, 5) generates a current-error signal (CE) which is a difference between a set current level (SC) and a level of a sensed current (SE) in the power converter (1). A driver (9) for switches off the controllable switch (S3) when the current error signal (CE) indicates that the level of the sensed current (SE) has reached the set current level (SC). A voltage feedback loop (10, 3, 7, 8, 5) influences the set current level (SC) in response to a level of an output voltage (Vout) of the power converter (1).

Abstract: A current-mode controlled power converter (1) comprises a controllable switch (S3) which is coupled to an inductor (L1) to obtain a periodical current (I1) through the inductor (L1). A current feedback loop (2, 3, 4, 5) generates a current-error signal (CE) which is a difference between a set current level (SC) and a level of a sensed current (SE) in the power converter (1). A driver (9) for switches off the controllable switch (S3) when the current error signal (CE) indicates that the level of the sensed current (SE) has reached the set current level (SC). A voltage feedback loop (10, 3, 7, 8, 5) influences the set current level (SC) in response to a level of an output voltage (Vout) of the power converter (1).

Abstract: A fully digital DC/DC automatic up/down converter circuit converts an input voltage to an output voltage of a predetermined value based on a switching operation. The switching operation includes switching operation comprise-cycles having at least one switching operation phase. The converter is controlled by a digital controller having a look-up table in which a plurality of data is stored. The digital controller uses certain data from the plurality of data with respect to an actual switched operating mode for continuously adjusting the begin and the end of a switching operation. The switched operating modes are a PWM and a PFM mode.

Abstract: The present invention relates to a fully digital DC/DC automatic up/down converter circuit (10) for converting an input voltage to an output voltage of a predetermined value based on a switching operation. The switching operation comprises switching operation cycles, which comprise at least one switching operation phase. The converter is controlled by digital controller (20), which comprises a look-up table in which a plurality of data is stored. The digital controller uses certain data from said plurality of data with respect to an actual switched operating mode for continuous adjusting begin and end of a switching operation. The switched operating modes are a PWM and a PFM mode. The converter is optimal for portable electronic equipment, which come with a battery pack for power supply. Advantageously, the converter of the invention provides a stable output voltage over the whole range of the input voltage supplied by such battery pack.

Abstract: A phase-locked-loop (PLL) with stable phase discrimination includes a charge pump with a current source and current sink to control a VCO, and a phase discriminator to compare the VCO's signal to a stable reference signal for controlling the charge pump. The phase discriminator includes a resettable D-flipflop to provide the current source control signal and a resettable D-flipflop to provide the current sink control signal. The reset signal keeps both sink and source temporarily alive to avoid a dead zone region. The reset signal is produced under the combined control of the sink and source control signals and, in addition, of the reference signal to enhance stability.

Abstract: A device for determining the charge status of a battery (4) when it is discharged by a load (R.sub.L) and/or when it is charged by a power-supply circuit (1) in which a value representing the nominal charging time and discharging time respectively is stored in first (10) and second adjusting means (11) respectively and is applied to computing means (12). In response to clock pulses applied to the computing means by a clock means (13), the computing means calculate the charge status of the battery by expressing the elapsed discharging or charging time as a fraction of the adjusted discharging time and charging time respectively. The computed charge status is indicated by indicator means (14). During discharging and charging an actual charge status is detected by first (7) and second (16) detection means.