Patents by Inventor Lan D. Phan

Lan D. Phan has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11543974
    Abstract: A data storage subsystem is disclosed that implements a process for storing and/or reconstructing system data, such as a system mapping table. In certain embodiments, table pages are systematically copied, or flushed, to non-volatile memory in a progressive manner, according to a fixed ratio of flushed table pages per table update trigger, thereby facilitating write and/or load efficiency. Full or partial reconstruction of a table may be performed within a bounded number of operations based on the size of the table, the ratio implemented, and/or other characteristics.
    Type: Grant
    Filed: January 20, 2021
    Date of Patent: January 3, 2023
    Assignee: Western Digital Technologies, Inc.
    Inventors: Jerry Lo, Dominic S. Suryabudi, Lan D. Phan
  • Publication number: 20210141543
    Abstract: A data storage subsystem is disclosed that implements a process for storing and/or reconstructing system data, such as a system mapping table. In certain embodiments, table pages are systematically copied, or flushed, to non-volatile memory in a progressive manner, according to a fixed ratio of flushed table pages per table update trigger, thereby facilitating write and/or load efficiency. Full or partial reconstruction of a table may be performed within a bounded number of operations based on the size of the table, the ratio implemented, and/or other characteristics.
    Type: Application
    Filed: January 20, 2021
    Publication date: May 13, 2021
    Inventors: Jerry LO, Dominic S. SURYABUDI, Lan D. PHAN
  • Patent number: 10942656
    Abstract: A data storage subsystem is disclosed that implements a process for storing and/or reconstructing system data, such as a system mapping table. In certain embodiments, table pages are systematically copied, or flushed, to non-volatile memory in a progressive manner, according to a fixed ratio of flushed table pages per table update trigger, thereby facilitating write and/or load efficiency. Full or partial reconstruction of a table may be performed within a bounded number of operations based on the size of the table, the ratio implemented, and/or other characteristics.
    Type: Grant
    Filed: July 26, 2019
    Date of Patent: March 9, 2021
    Assignee: WESTERN DIGITAL TECHNOLOGIES, INC.
    Inventors: Jerry Lo, Dominic S. Suryabudi, Lan D. Phan
  • Publication number: 20190347017
    Abstract: A data storage subsystem is disclosed that implements a process for storing and/or reconstructing system data, such as a system mapping table. In certain embodiments, table pages are systematically copied, or flushed, to non-volatile memory in a progressive manner, according to a fixed ratio of flushed table pages per table update trigger, thereby facilitating write and/or load efficiency. Full or partial reconstruction of a table may be performed within a bounded number of operations based on the size of the table, the ratio implemented, and/or other characteristics.
    Type: Application
    Filed: July 26, 2019
    Publication date: November 14, 2019
    Inventors: Jerry LO, Dominic S. SURYABUDI, Lan D. PHAN
  • Patent number: 10379755
    Abstract: A data storage subsystem is disclosed that implements a process for storing and/or reconstructing system data, such as a system mapping table. In certain embodiments, table pages are systematically copied, or flushed, to non-volatile memory in a progressive manner, according to a fixed ratio of flushed table pages per table update trigger, thereby facilitating write and/or load efficiency. Full or partial reconstruction of a table may be performed within a bounded number of operations based on the size of the table, the ratio implemented, and/or other characteristics.
    Type: Grant
    Filed: October 26, 2015
    Date of Patent: August 13, 2019
    Assignee: Western Digital Technologies, Inc.
    Inventors: Jerry Lo, Dominic S. Suryabudi, Lan D. Phan
  • Patent number: 10048875
    Abstract: Embodiments of this disclosure relate to improving solid-state non-volatile memory management. Embodiments improve the management of solid-state non-volatile memory by providing an execution manager responsible for controlling the timing of providing a request to a memory unit for execution. In embodiments, the execution manager traverses a list of received requests for memory access and dispatches commands for execution. In embodiments, if a request is directed to memory units which have reached a threshold for outstanding requests, the request may be skipped so that other requests can be dispatched for memory units which have not yet reached the threshold.
    Type: Grant
    Filed: October 14, 2016
    Date of Patent: August 14, 2018
    Assignee: WESTERN DIGITAL TECHNOLOGIES, INC.
    Inventor: Lan D. Phan
  • Patent number: 9875025
    Abstract: Systems and methods for retaining data are disclosed in which refresh copy operations are performed on data stored in non-volatile solid-state memory. A controller may be configured to maintain a list of physical memory locations, the list sorted by a least recently used criterion. The controller may select a first entry from a top of the list and perform a refresh operation to copy data stored in a current physical memory location associated with the first entry to a new physical memory location, and may remove the first entry from the top of the list and add a new entry associated with the new physical memory location to a bottom of the list. The controller may repeat the select, perform, remove and add steps for a plurality of entries in the list, and the steps may be timed such that all refresh operations are performed for all of the plurality of entries within a set period of time.
    Type: Grant
    Filed: September 14, 2015
    Date of Patent: January 23, 2018
    Assignee: Western Digital Technologies, Inc
    Inventors: Mei-Man L. Syu, Matthew Call, Ho-Fan Kang, Lan D. Phan
  • Patent number: 9652379
    Abstract: Embodiments of the invention are directed to enabling concurrent commands from command requesters in a non-volatile solid-state storage subsystem in a manner that reduces contentions among the commands. Embodiments group blocks of memory into multiple sets of superblocks and associate a command requester to each superblock set. In one embodiment, the superblock sets are dynamically associated with a requester. In one embodiment, the superblock sets are dynamically associated with requesters based in part on at least one of internal memory management needs and host command throughput. In one embodiment, an erase command is executed on a superblock within a set and a simultaneous write command is executed on a superblock within another set.
    Type: Grant
    Filed: April 30, 2014
    Date of Patent: May 16, 2017
    Assignee: Western Digital Technologies, Inc.
    Inventors: Mei-Man L. Syu, Matthew Call, Ho-Fan Kang, Lan D. Phan
  • Publication number: 20170031607
    Abstract: Embodiments of this disclosure relate to improving solid-state non-volatile memory management. Embodiments improve the management of solid-state non-volatile memory by providing an execution manager responsible for controlling the timing of providing a request to a memory unit for execution. In embodiments, the execution manager traverses a list of received requests for memory access and dispatches commands for execution. In embodiments, if a request is directed to memory units which have reached a threshold for outstanding requests, the request may be skipped so that other requests can be dispatched for memory units which have not yet reached the threshold.
    Type: Application
    Filed: October 14, 2016
    Publication date: February 2, 2017
    Inventor: Lan D. PHAN
  • Patent number: 9477413
    Abstract: Embodiments of this disclosure relate to improving solid-state non-volatile memory management. Embodiments improve the management of solid-state non-volatile memory by providing an execution manager responsible for controlling the timing of providing a request to a memory unit for execution. In embodiments, the execution manager traverses a list of received requests for memory access and dispatches commands for execution. In embodiments, if a request is directed to memory units which have reached a threshold for outstanding requests, the request may be skipped so that other requests can be dispatched for memory units which have not yet reached the threshold.
    Type: Grant
    Filed: October 16, 2015
    Date of Patent: October 25, 2016
    Assignee: Western Digital Technologies, Inc.
    Inventor: Lan D. Phan
  • Patent number: 9405675
    Abstract: Embodiments of the invention are directed to enable simultaneous or nearly simultaneous execution of internal and host-issued commands in a non-volatile storage subsystem while maintaining data consistency. Embodiments maintain validity information on data residing at physical addresses as well as logical to physical address mappings in the solid-state storage subsystem. In one embodiment, a controller within the storage subsystem selectively cancels internal commands that it determines to be writing data that has been rendered invalid by another command. In one embodiment, the determination is made by consulting the validity information kept by the controller in an invalid page table.
    Type: Grant
    Filed: June 12, 2014
    Date of Patent: August 2, 2016
    Assignee: Western Digital Technologies, Inc.
    Inventors: Ho-Fan Kang, Lan D. Phan
  • Publication number: 20160048352
    Abstract: A data storage subsystem is disclosed that implements a process for storing and/or reconstructing system data, such as a system mapping table. In certain embodiments, table pages are systematically copied, or flushed, to non-volatile memory in a progressive manner, according to a fixed ratio of flushed table pages per table update trigger, thereby facilitating write and/or load efficiency. Full or partial reconstruction of a table may be performed within a bounded number of operations based on the size of the table, the ratio implemented, and/or other characteristics.
    Type: Application
    Filed: October 26, 2015
    Publication date: February 18, 2016
    Inventors: Jerry LO, Dominic S. SURYABUDI, Lan D. PHAN
  • Publication number: 20160041773
    Abstract: Embodiments of this disclosure relate to improving solid-state non-volatile memory management. Embodiments improve the management of solid-state non-volatile memory by providing an execution manager responsible for controlling the timing of providing a request to a memory unit for execution. In embodiments, the execution manager traverses a list of received requests for memory access and dispatches commands for execution. In embodiments, if a request is directed to memory units which have reached a threshold for outstanding requests, the request may be skipped so that other requests can be dispatched for memory units which have not yet reached the threshold.
    Type: Application
    Filed: October 16, 2015
    Publication date: February 11, 2016
    Inventor: Lan D. PHAN
  • Publication number: 20160004446
    Abstract: Systems and methods for retaining data in non-volatile solid-state memory are disclosed in which refresh copy operations are performed on data stored in non-volatile solid-state memory. A controller may be configured to issue copy commands and to maintain usage data on a storage subsystem. A refresh copy operation helps ensure that data written to memory retain integrity by causing data to be programmed again onto the memory, which minimizes the risk of data error caused by electron leak in the non-volatile solid-state memory. The controller may be configured to maintain a list of physical memory locations storing data in non-volatile solid-state memory array, where the list is sorted by a least recently used criterion. In one embodiment, the controller may select a first entry from a top of the list for processing and issue a copy command stored in a current physical memory location associated with the first entry to a new physical memory location.
    Type: Application
    Filed: September 14, 2015
    Publication date: January 7, 2016
    Inventors: Mei-Man L. SYU, Matthew CALL, Ho-Fan KANG, Lan D. PHAN
  • Patent number: 9170932
    Abstract: A data storage subsystem is disclosed that implements a process for storing and/or reconstructing system data, such as a system mapping table. In certain embodiments, table pages are systematically copied, or flushed, to non-volatile memory in a progressive manner, according to a fixed ratio of flushed table pages per table update trigger, thereby facilitating write and/or load efficiency. Full or partial reconstruction of a table may be performed within a bounded number of operations based on the size of the table, the ratio implemented, and/or other characteristics.
    Type: Grant
    Filed: May 22, 2012
    Date of Patent: October 27, 2015
    Assignee: WESTERN DIGITAL TECHNOLOGIES, INC.
    Inventors: Jerry Lo, Dominic S. Suryabudi, Lan D. Phan
  • Patent number: 9164886
    Abstract: Embodiments of this disclosure relate to improving solid-state non-volatile memory management. Embodiments improve the management of solid-state non-volatile memory by providing an execution manager responsible for controlling the timing of providing a request to a memory unit for execution. In embodiments, the execution manager traverses a list of received requests for memory access and dispatches commands for execution. In embodiments, if a request is directed to memory units which have reached a threshold for outstanding requests, the request may be skipped so that other requests can be dispatched for memory units which have not yet reached the threshold.
    Type: Grant
    Filed: June 23, 2011
    Date of Patent: October 20, 2015
    Assignee: WESTERN DIGITAL TECHNOLOGIES, INC.
    Inventor: Lan D. Phan
  • Patent number: 9135166
    Abstract: Systems and methods for retaining data in non-volatile solid-state memory are disclosed in which refresh copy operations are performed on data stored in non-volatile solid-state memory. A controller can comprise a data retention module configured to issue copy commands within different periods of time and to maintain usage data on a storage subsystem. A refresh copy operation helps ensure that data written to memory retain integrity by causing data to be programmed again onto the memory. Execution of refresh copy commands may be prioritized over other commands based on a remaining length of time. One or more data structures may be used to determine memory blocks that require refresh copy operations. In one embodiment, a validity bit array is used to track blocks that contain valid data. In another embodiment, a least recently used list is used to track blocks that have been least recently written.
    Type: Grant
    Filed: November 22, 2013
    Date of Patent: September 15, 2015
    Assignee: Western Digital Technologies, Inc.
    Inventors: Mei-Man L. Syu, Matthew Call, Ho-Fan Kang, Lan D. Phan
  • Patent number: 9110835
    Abstract: In one embodiment of the invention, a flash-based/solid-state storage system with an implemented data redundancy scheme such as RAID is configured to hold parity data in a volatile memory such as RAM and write such parity data to the non-volatile flash media when a full stripe of data has been written to the media. Other embodiments in certain situations force an early write of the parity for a partial stripe that has not been fully written to the non-volatile media. Those situations may include a data access error on data in a partial stripe and a detected power loss event with a partial stripe present. Embodiments are directed to writing additional data with the parity data for the partial stripe and then later using the additional data in data recovery. This approach allows the controller to easily detect the presence of a partial stripe and handle such a stripe accordingly.
    Type: Grant
    Filed: March 17, 2014
    Date of Patent: August 18, 2015
    Assignee: Western Digital Technologies, Inc.
    Inventors: Matthew Call, John A. Morrison, Lan D. Phan, Mei-Man L. Syu
  • Patent number: 9075708
    Abstract: The present disclosure is directed to managing write commands for a storage system implementing address indirection. In some storage systems, a mapping table that provides logical-to-physical mapping may have individual entries that each references a logical address size that exceeds the size of an atomic write to the storage media. In such systems, a write to a logical address is not atomic as it may require several discrete physical writes that may individually fail. The techniques presented employ several pre-commit and post-commit actions to save data that enables the storage system to make writes to these logical addresses atomic and prevent undue delay on powerup.
    Type: Grant
    Filed: June 30, 2011
    Date of Patent: July 7, 2015
    Assignee: Western Digital Technologies, Inc.
    Inventors: Ho-Fan Kang, Stephen P. Hack, Jerry Lo, Frederick H. Adi, Lan D. Phan
  • Patent number: 9021192
    Abstract: Embodiments of this disclosure relate to improving solid-state non-volatile memory management. Embodiments improve the management of solid-state non-volatile memory by providing a central manager responsible for receiving requests from media access requesters. In embodiments, the central manager updates requests with a physical address corresponding to a logical address for a request. In embodiments, the central manager is the only entity updating a mapping table and invalid page table for the system. In embodiments, the central manager may also throttle or prioritize requests originating from two or more requesters to change the ratio of requests executed from each requester.
    Type: Grant
    Filed: June 17, 2011
    Date of Patent: April 28, 2015
    Assignee: Western Digital Technologies, Inc.
    Inventors: Ho-Fan Kang, Lan D. Phan