Patents by Inventor Lan Fang Chang

Lan Fang Chang has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20220165882
    Abstract: A semiconductor includes a gate stack over a substrate. The semiconductor device further includes an interlayer dielectric (ILD) at least partially enclosing the gate stack. The ILD includes a portion doped with a large species material, wherein the portion includes a first sidewall substantially perpendicular to a top-most surface of the ILD, and the portion includes a second sidewall having a positive angle with respect to the first sidewall.
    Type: Application
    Filed: February 10, 2022
    Publication date: May 26, 2022
    Inventors: Cheng-Ta WU, Chii-Ming WU, Shiu-Ko JANGJIAN, Kun-Tzu LIN, Lan-Fang CHANG
  • Patent number: 11271114
    Abstract: A semiconductor device includes a gate stack over a substrate. The semiconductor device further includes an interlayer dielectric (ILD) at least partially enclosing the gate stack. The ILD includes a first portion doped with an oxygen-containing material. The ILD further includes a second portion doped with a large species material, wherein the second portion includes a first sidewall substantially perpendicular to a top surface of the substrate, and the second portion includes a second sidewall having a positive angle with respect to the first sidewall.
    Type: Grant
    Filed: June 1, 2020
    Date of Patent: March 8, 2022
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
    Inventors: Cheng-Ta Wu, Chii-Ming Wu, Shiu-Ko Jangjian, Kun-Tzu Lin, Lan-Fang Chang
  • Publication number: 20200295193
    Abstract: A semiconductor device includes a gate stack over a substrate. The semiconductor device further includes an interlayer dielectric (ILD) at least partially enclosing the gate stack. The ILD includes a first portion doped with an oxygen-containing material. The ILD further includes a second portion doped with a large species material, wherein the second portion includes a first sidewall substantially perpendicular to a top surface of the substrate, and the second portion includes a second sidewall having a positive angle with respect to the first sidewall.
    Type: Application
    Filed: June 1, 2020
    Publication date: September 17, 2020
    Inventors: Cheng-Ta WU, Chii-Ming WU, Shiu-Ko JANGJIAN, Kun-Tzu LIN, Lan-Fang CHANG
  • Patent number: 10672909
    Abstract: A semiconductor device including a gate stack over a substrate. The semiconductor device further includes an interlayer dielectric (ILD) at least partially enclosing the gate stack. The ILD includes a first portion doped with an oxygen-containing material, a second portion doped with a large species material, and a third portion being undoped by the oxygen-containing material and the large species material.
    Type: Grant
    Filed: June 28, 2018
    Date of Patent: June 2, 2020
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
    Inventors: Cheng-Ta Wu, Chii-Ming Wu, Shiu-Ko Jangjian, Kun-Tzu Lin, Lan-Fang Chang
  • Publication number: 20180308979
    Abstract: A semiconductor device including a gate stack over a substrate. The semiconductor device further includes an interlayer dielectric (ILD) at least partially enclosing the gate stack. The ILD includes a first portion doped with an oxygen-containing material, a second portion doped with a large species material, and a third portion being undoped by the oxygen-containing material and the large species material.
    Type: Application
    Filed: June 28, 2018
    Publication date: October 25, 2018
    Inventors: Cheng-Ta WU, Chii-Ming WU, Shiu-Ko JANGJIAN, Kun-Tzu LIN, Lan-Fang CHANG
  • Patent number: 10020401
    Abstract: A method of making a semiconductor device includes doping a first portion of an interlayer dielectric (ILD) with an oxygen-containing material, wherein the ILD is over a substrate. The method further includes doping a second portion of the ILD with a large species material. The second portion includes an area of the ILD below the first portion, and the second portion is separated from the substrate. The method further includes annealing the ILD.
    Type: Grant
    Filed: January 5, 2017
    Date of Patent: July 10, 2018
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
    Inventors: Cheng-Ta Wu, Chii-Ming Wu, Shiu-Ko Jangjian, Kun-Tzu Lin, Lan-Fang Chang
  • Publication number: 20180151740
    Abstract: A method of making a semiconductor device includes doping a first portion of an interlayer dielectric (ILD) with an oxygen-containing material, wherein the ILD is over a substrate. The method further includes doping a second portion of the ILD with a large species material. The second portion includes an area of the ILD below the first portion, and the second portion is separated from the substrate. The method further includes annealing the ILD.
    Type: Application
    Filed: January 5, 2017
    Publication date: May 31, 2018
    Inventors: Cheng-Ta WU, Chii-Ming WU, Shiu-Ko JANGJIAN, Kun-Tzu LIN, Lan-Fang CHANG
  • Patent number: 8860101
    Abstract: A system and method for reducing cross-talk between photosensitive diodes is provided. In an embodiment an isolation region comprising a first concentration of dopants is located between the photosensitive diodes. The photosensitive diodes have a second concentration of dopants that is less than the first concentration of dopants, which helps to prevent diffusion from the photosensitive diodes to form a potential path for undesired cross-talk between the photosensitive diodes.
    Type: Grant
    Filed: February 27, 2012
    Date of Patent: October 14, 2014
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Lan Fang Chang, Ching-Hwanq Su, Wei-Ming You, Chih-Cherng Jeng, Chih-Kang Chao, Fu-Sheng Guo
  • Publication number: 20130207220
    Abstract: A system and method for reducing cross-talk between photosensitive diodes is provided. In an embodiment an isolation region comprising a first concentration of dopants is located between the photosensitive diodes. The photosensitive diodes have a second concentration of dopants that is less than the first concentration of dopants, which helps to prevent diffusion from the photosensitive diodes to form a potential path for undesired cross-talk between the photosensitive diodes.
    Type: Application
    Filed: February 27, 2012
    Publication date: August 15, 2013
    Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Lan Fang Chang, Ching-Hwanq Su, Wei-Ming You, Chih-Cherng Jeng, Chih-Kang Chao, Fu-Sheng Guo
  • Patent number: 8129203
    Abstract: A method of manufacturing integrated circuits includes measuring a reflectivity value of a wafer. An optimum energy level for laser marking the wafer is determined using the reflectivity value. A laser beam having the optimum energy level is then emitted to make laser marks on the wafer.
    Type: Grant
    Filed: December 11, 2009
    Date of Patent: March 6, 2012
    Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventors: Lan Fang Chang, Wei-Ming You
  • Publication number: 20100240155
    Abstract: A method of manufacturing integrated circuits includes measuring a reflectivity value of a wafer. An optimum energy level for laser marking the wafer is determined using the reflectivity value. A laser beam having the optimum energy level is then emitted to make laser marks on the wafer.
    Type: Application
    Filed: December 11, 2009
    Publication date: September 23, 2010
    Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Lan Fang Chang, Wei-Ming You