Patents by Inventor Lan Peng
Lan Peng has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Publication number: 20240112944Abstract: The present disclosure relates to a temporary wafer bonding process including the steps of: providing a wafer for back processing by laminating a plain protective film on a front surface of the wafer; providing a rigid carrier; bonding the rigid carrier to the plain protective film by the intermediate of a bonding material layer; processing a back surface of the wafer; and separating the rigid carrier and the plain protective film from the wafer.Type: ApplicationFiled: September 26, 2023Publication date: April 4, 2024Inventors: Jakob Visker, Lan Peng, Serge Vanhaelemeersch, Aurelie Humbert, Chi Dang Thi Thuy, Evert Visker
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Publication number: 20240015744Abstract: A first device sends first control information and second control information to a second device. At least one of a first field or a second field in the first control information indicates a format of the first control information and a format of the second control information. A first format of the first control information indicates a time-frequency resource for feeding back a specified message by the second device. A third format of the second control information indicates a redundancy version of the specified message fed back by the second device. When the first control information is in the first format and the second control information is in the third format, the first device receives, on the time-frequency resource, the specified message fed back by the second device.Type: ApplicationFiled: November 23, 2021Publication date: January 11, 2024Inventors: Lan Peng, Xueru Li
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Patent number: 11804834Abstract: An electromagnetic interference regulator by use of capacitive parameters of the field-effect transistor for detecting the induced voltage and the induced current of the field-effect transistor to determine whether the operating frequency of the field-effect transistor is within the preset special management frequency of electromagnetic interference. When the basic frequency and the multiplied frequency exceed the limit, the content of the external capacitor unit can be adjusted to assist the products using field-effect transistors to maintain excellent electromagnetic interference adjustment capabilities under various loads, thereby optimizing the characteristics of electromagnetic interference.Type: GrantFiled: November 23, 2021Date of Patent: October 31, 2023Assignee: POTENS SEMICONDUCTOR CORP.Inventors: Wen Nan Huang, Ching Kuo Chen, Shiu Hui Lee, Hsiang Chi Meng, Cho Lan Peng, Chuo Chien Tsao
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Publication number: 20230319856Abstract: A method includes a first device that sends a beacon message on a beacon indication resource corresponding to a first resource, where the beacon message indicates that the first resource is used by a device in a first user group and another user group cannot use all or a part of the first resource; or the first device skips sending the beacon message on the beacon indication resource corresponding to the first resource such that a device in the other user group determines that the first resource is not used by the device in the first user group and all or part of the first resource can be temporarily used by the device in the other user group.Type: ApplicationFiled: July 28, 2021Publication date: October 5, 2023Inventors: Hongli He, Xueru Li, Lan Peng
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Publication number: 20230292355Abstract: This application discloses an information sending method and an apparatus, and relate to the communication field. The method includes: A first terminal sends a first indication message to a second terminal, where the first indication message indicates the second terminal to report first information; the second terminal reports the first information to the first terminal according to the first indication message, where the first information indicates channel state information of a channel resource; the first terminal sends a second indication message to the second terminal, where the second indication message indicates information about a first resource set, the first resource set is determined by the first terminal based on the first information, and a resource in the first resource set is a resource for sidelink communication.Type: ApplicationFiled: July 14, 2021Publication date: September 14, 2023Inventors: Lan Peng, Xueru Li
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Publication number: 20230156657Abstract: A method includes receiving, from a reference node, a first positioning measurement reference signal transmitted through N transmission paths, where N is an integer greater than 1; measuring first positioning information based on the first positioning measurement reference signal on a first transmission path, where the first transmission path is one of the N transmission paths; and sending first indication information and a second positioning measurement reference signal to the reference node, where the first indication information is used to indicate the first transmission path, so that the reference node measures second positioning information on the first transmission path.Type: ApplicationFiled: January 23, 2023Publication date: May 18, 2023Inventors: Wei Huang, Xueru Li, Lan Peng
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Publication number: 20230038599Abstract: An electromagnetic interference regulator by use of capacitive parameters of the field-effect transistor for detecting the induced voltage and the induced current of the field-effect transistor to determine whether the operating frequency of the field-effect transistor is within the preset special management frequency of electromagnetic interference. When the basic frequency and the multiplied frequency exceed the limit, the content of the external capacitor unit can be adjusted to assist the products using field-effect transistors to maintain excellent electromagnetic interference adjustment capabilities under various loads, thereby optimizing the characteristics of electromagnetic interference.Type: ApplicationFiled: November 23, 2021Publication date: February 9, 2023Applicant: Potens Semiconductor Corp.Inventors: Wen Nan Huang, Ching Kuo Chen, Shiu Hui Lee, Hsiang Chi Meng, Cho Lan Peng, Chuo Chien Tsao
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Publication number: 20230039285Abstract: A hybrid metal-oxide semiconductor field-effect transistor with variable gate impedance and an implementation method thereof, wherein the hybrid metal-oxide semiconductor field-effect transistor has the characteristic of changing the on-resistance according to different drive voltages. By use of a feedback loop and a variable gate drive voltage generator which can vary the generated gate drive voltage based on different loads, the present disclosure can still adjust the gate drive voltage under different load conditions without requiring a plurality of metal-oxide semiconductor field-effect transistors in series/parallel to achieve the lowest power loss.Type: ApplicationFiled: November 23, 2021Publication date: February 9, 2023Inventors: Wen Nan HUANG, Ching Kuo CHEN, Shiu Hui LEE, Tung Ming LAI, Cho Lan PENG, Chuo Chien TSAO
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Publication number: 20210005444Abstract: According to an aspect of the present inventive concept there is provided a method for manufacturing a silicon on nitride, SON, substrate. The method comprises the steps of providing a semiconductor layer of a first crystal orientation, forming, on the semiconductor layer, an interface layer comprising a monocrystalline III-nitride layer forming a nucleation layer for a subsequent epitaxy process, and bonding a silicon substrate of a second crystal orientation with the interface layer.Type: ApplicationFiled: July 1, 2020Publication date: January 7, 2021Inventors: Hu LIANG, Lan PENG
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Patent number: 10886252Abstract: The disclosed technology generally relates to integrating semiconductor dies and more particularly to bonding semiconductor substrates. In an aspect, a method of bonding semiconductor substrates includes providing a first substrate and a second substrate. Each of the first substrate and the second substrate comprises a dielectric bonding layer comprising one or more a silicon carbon oxide (SiCO) layer, a silicon carbon nitride (SiCN) layer or a silicon carbide (SiC) layer. The method additionally includes, prior to bonding the first and second substrates, pre-treating each of the dielectric bonding layer of the first substrate and the dielectric bonding layer of the second substrate. Pre-treating includes a first plasma activation process in a plasma comprising an inert gas, a second plasma activation process in a plasma comprising oxygen, and a wet surface treatment including a water rinsing step or an exposure to a water-containing ambient.Type: GrantFiled: February 28, 2018Date of Patent: January 5, 2021Assignee: IMEC vzwInventors: Lan Peng, Soon-Wook Kim, Eric Beyne, Gerald Peter Beyer, Erik Sleeckx, Robert Miller
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Patent number: 10141284Abstract: The disclosed technology generally relates to semiconductor wafer bonding, and more particularly to direct bonding by contacting surfaces of the semiconductor wafers. In one aspect, a method for bonding a first semiconductor substrate to a second semiconductor substrate by direct bonding is described. The substrates are both provided on their contact surfaces with a dielectric layer, followed by a CMP step for reducing the roughness of the dielectric layer. Then a layer of SiCN is deposited onto the dielectric layer, followed by a CMP step which reduces the roughness of the SiCN layer to the order of 1 tenth of a nanometer. Then the substrates are subjected to a pre-bond annealing step and then bonded by direct bonding, possibly preceded by one or more pre-treatments of the contact surfaces, and followed by a post-bond annealing step, at a temperature of less than or equal to 250° C.Type: GrantFiled: May 24, 2017Date of Patent: November 27, 2018Assignee: IMEC vzwInventors: Soon-Wook Kim, Lan Peng, Patrick Verdonck, Robert Miller, Gerald Peter Beyer, Eric Beyne
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Publication number: 20180247914Abstract: The disclosed technology generally relates to integrating semiconductor dies and more particularly to bonding semiconductor substrates. In an aspect, a method of bonding semiconductor substrates includes providing a first substrate and a second substrate. Each of the first substrate and the second substrate comprises a dielectric bonding layer comprising one or more a silicon carbon oxide (SiCO) layer, a silicon carbon nitride (SiCN) layer or a silicon carbide (SiC) layer. The method additionally includes, prior to bonding the first and second substrates, pre-treating each of the dielectric bonding layer of the first substrate and the dielectric bonding layer of the second substrate. Pre-treating includes a first plasma activation process in a plasma comprising an inert gas, a second plasma activation process in a plasma comprising oxygen, and a wet surface treatment including a water rinsing step or an exposure to a water-containing ambient.Type: ApplicationFiled: February 28, 2018Publication date: August 30, 2018Inventors: Lan Peng, Soon-Wook Kim, Eric Beyne, Gerald Peter Beyer, Erik Sleeckx, Robert Miller
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Publication number: 20170301646Abstract: The disclosed technology generally relates to semiconductor wafer bonding, and more particularly to direct bonding by contacting surfaces of the semiconductor wafers. In one aspect, a method for bonding a first semiconductor substrate to a second semiconductor substrate by direct bonding is described. The substrates are both provided on their contact surfaces with a dielectric layer, followed by a CMP step for reducing the roughness of the dielectric layer. Then a layer of SiCN is deposited onto the dielectric layer, followed by a CMP step which reduces the roughness of the SiCN layer to the order of 1 tenth of a nanometer. Then the substrates are subjected to a pre-bond annealing step and then bonded by direct bonding, possibly preceded by one or more pre-treatments of the contact surfaces, and followed by a post-bond annealing step, at a temperature of less than or equal to 250° C.Type: ApplicationFiled: May 24, 2017Publication date: October 19, 2017Inventors: Soon-Wook Kim, Lan Peng, Patrick Verdonck, Robert Miller, Gerald Peter Beyer, Eric Beyne
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Publication number: 20090051541Abstract: A RFID certified document preparing method includes the steps of: (1) providing a medium and printing an antenna on the medium, (2) printing document data on the medium, and (3) electrically connecting a chip to the antenna via a pad. The invention also provides a RFID certified document prepared according to this method.Type: ApplicationFiled: July 21, 2008Publication date: February 26, 2009Inventors: Cho-Lan Peng, I-Ju Fu, Pao-Cheng Hsiao, Yung-Chih Lo
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Publication number: 20040193602Abstract: A method and a system for maintenance of engineering change data are provided. A form generation module generates an electronic form for maintenance of engineering change data according to access rights and search conditions input from a user via a terminal device. A verification module compares engineering data before and after being modified by the user to determine if engineering data, unexpected to be changed, are modified by the user; if yes, the verification module generates an alert message to confirm this modification with the user. A transfer module transfers the electronic form with the engineering change data to an associated responsible unit for verification and approval. A maintenance module updates and upgrades version of engineering data in a database and a backend data processing system once the engineering change data are verified and approved. By the above method and system, operational errors and invalid data modification are eliminated.Type: ApplicationFiled: March 28, 2003Publication date: September 30, 2004Inventors: Chiu-Juan Liu, Li-Hua Lee, Hui Lan Peng, Chien-Miug Tseng, Kuang-Yu Peng, Jui-Kuang Wei
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Patent number: 6476174Abstract: A process for preparing silica-based organic-inorganic hybrid resin using sol-gel process. Phenol is used as catalyst to reduce the gel time of the sol-gel process and cyclosiloxane is used as modifier to increase the toughness of the resultant inorganic-organic hybrid resin.Type: GrantFiled: June 15, 2001Date of Patent: November 5, 2002Assignee: Industrial Technology Research InstituteInventors: Ming-Shi Lee, Chin-I Lin, Chao-Kang Chang, Ching-Jiuh Kang, Kuei-Lan Peng
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Patent number: 6337363Abstract: The present invention discloses an epoxy resin composition with a non-halogen, non-phosphorus flame retardant, which comprises (a) 100 parts by weight of an epoxy resin; (b) 40-60 parts by weight of a phenolic novolac hardener; and (c) 5-60 parts by weight of a silica-novolac hybrid resin solution as a flame retardant.Type: GrantFiled: September 28, 2000Date of Patent: January 8, 2002Assignee: Industrial Technology Research InstituteInventors: Ming-Shi Lee, Ching-Jiuh Kang, Kuei-Lan Peng
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Patent number: D423066Type: GrantFiled: February 22, 1999Date of Patent: April 18, 2000Inventor: Kuei Lan Peng