Patents by Inventor Lance A. Scudder

Lance A. Scudder has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20210363630
    Abstract: Embodiments of the present disclosure generally relate to protective coatings on various substrates including aerospace components and methods for depositing the protective coatings. In one or more embodiments, a method of forming a protective coating on an aerospace component includes forming an aluminum oxide layer on a surface of the aerospace component and depositing a boron nitride layer on or over the aluminum oxide layer during a vapor deposition process. In some examples, the method includes depositing a metal-containing catalytic layer on the aluminum oxide layer before depositing the boron nitride layer. The boron nitride layer can include hexagonal boron nitride (hBN).
    Type: Application
    Filed: July 6, 2020
    Publication date: November 25, 2021
    Inventors: David Alexander BRITZ, Lance A. SCUDDER, Yuriy MELNIK, Sukti CHATTERJEE
  • Publication number: 20210156267
    Abstract: Embodiments of the present disclosure generally relate to protective coatings on turbine blades, turbine disks, and other aerospace components and methods for depositing the protective coatings. In one or more embodiments, a turbine blade includes a blade portion and a root coupled to the blade portion, where the root contains a protective coating disposed thereon. The protective coating is or contains one or more deposited crystalline film containing at least one of a metal oxide, a metal nitride, or a metal oxynitride and has a thickness of about 100 nm to about 10 ?m. In some examples, a turbine blade assembly includes a disk and a plurality of the turbine blades coupled to the disk. The protective coating is disposed on the root on the turbine blade and/or a receiving surface on the turbine disk.
    Type: Application
    Filed: March 17, 2020
    Publication date: May 27, 2021
    Inventors: Sukti CHATTERJEE, Lance A. SCUDDER, David Alexander BRITZ, Kenichi OHNO
  • Publication number: 20210156789
    Abstract: A method for detecting corrosion on a conductive object includes submerging a surface of the conductive object at least partially in an aqueous solution, flowing current through the surface of the conductive object by forming a voltage differential across the surface, varying the voltage differential across the surface while monitoring the current through the surface of the conductive object, determining a total charge corresponding to a corrosion level of the surface of the conductive object based on current versus voltage levels. The corrosion level may further be utilized in selecting a cleaning process to remediate the corrosion of the surface based on the corrosion level and in applying a protective corrosion barrier to on at least part of the surface after the cleaning process.
    Type: Application
    Filed: November 21, 2019
    Publication date: May 27, 2021
    Inventors: Gang Grant PENG, Robert Douglas MIKKOLA, David BRITZ, Lance SCUDDER, David W. GROECHEL
  • Publication number: 20210074539
    Abstract: Methods and apparatus provide plasma generation for semiconductor process chambers. In some embodiments, the plasma is generated by a system that may comprise a process chamber having at least two upper microwave cavities separated from a lower microwave cavity by a metallic plate with a plurality of radiation slots, at least one microwave input port connected to a first one of the at least two upper microwave cavities, at least two microwave input ports connected to a second one of the at least two upper microwave cavities, and the lower microwave cavity receives radiation through the plurality of radiation slots in the metallic plate from both of the at least two upper microwave cavities, the lower microwave cavity is configured to form an electric field that provides uniform plasma distribution in a process volume of the process chamber.
    Type: Application
    Filed: September 5, 2019
    Publication date: March 11, 2021
    Inventors: Satoru Kobayashi, Hideo Sugai, Denis Ivanov, Lance Scudder, Dmitry Lubomirsky
  • Publication number: 20210071299
    Abstract: Embodiments of the present disclosure generally relate to protective coatings on substrates and methods for depositing the protective coatings. In one or more embodiments, a method of forming a protective coating on a substrate includes depositing a chromium oxide layer containing amorphous chromium oxide on a surface of the substrate during a first vapor deposition process and heating the substrate containing the chromium oxide layer comprising the amorphous chromium oxide to convert at least a portion of the amorphous chromium oxide to crystalline chromium oxide during a first annealing process. The method also includes depositing an aluminum oxide layer containing amorphous aluminum oxide on the chromium oxide layer during a second vapor deposition process and heating the substrate containing the aluminum oxide layer disposed on the chromium oxide layer to convert at least a portion of the amorphous aluminum oxide to crystalline aluminum oxide during a second annealing process.
    Type: Application
    Filed: October 31, 2019
    Publication date: March 11, 2021
    Inventors: Kenichi OHNO, Eric H. LIU, Sukti CHATTERJEE, Yuriy MELNIK, Thomas KNISLEY, David Alexander BRITZ, Lance A. SCUDDER, Pravin K. NARWANKAR
  • Publication number: 20200392626
    Abstract: Embodiments of the present disclosure generally relate to protective coatings on aerospace components and methods for depositing the protective coatings. In one or more embodiments, a method for producing a protective coating on an aerospace component includes depositing a metal oxide template layer on the aerospace component containing nickel and aluminum (e.g., nickel-aluminum superalloy) and heating the aerospace component containing the metal oxide template layer during a thermal process and/or an oxidation process. The thermal process and/or oxidation process includes diffusing aluminum contained within the aerospace component towards a surface of the aerospace component containing the metal oxide template layer, oxidizing the diffused aluminum to produce an aluminum oxide layer disposed between the aerospace component and the metal oxide template layer, and removing at least a portion of the metal oxide template layer while leaving the aluminum oxide layer.
    Type: Application
    Filed: September 4, 2019
    Publication date: December 17, 2020
    Inventors: Sukti CHATTERJEE, Kenichi OHNO, Lance A. SCUDDER, Yuriy MELNIK, David A. BRITZ, Pravin K. NARWANKAR, Thomas KNISLEY, Mark SALY, Jeffrey ANTHIS
  • Publication number: 20200340107
    Abstract: Embodiments of the present disclosure generally relate to protective coatings on an aerospace component and methods for depositing the protective coatings. In one or more embodiments, a method for depositing a coating on an aerospace component includes depositing one or more layers on a surface of the aerospace component using an atomic layer deposition or chemical vapor deposition process, and performing a partial oxidation and annealing process to convert the one or more layers to a coalesced layer having a preferred phase crystalline assembly. During oxidation cycles, an aluminum depleted region is formed at the surface of the aerospace component, and an aluminum oxide region is formed between the aluminum depleted region and the coalesced layer. The coalesced layer forms a protective coating, which decreases the rate of aluminum depletion from the aerospace component and the rate of new aluminum oxide scale formation.
    Type: Application
    Filed: April 16, 2020
    Publication date: October 29, 2020
    Applicant: Applied Materials, Inc.
    Inventors: Sukti CHATTERJEE, Lance A. SCUDDER, Yuriy MELNIK, David A. BRITZ, Thomas KNISLEY, Kenichi OHNO, Pravin K. NARWANKAR
  • Publication number: 20200240018
    Abstract: Protective coatings on an aerospace component are provided. An aerospace component includes a surface containing nickel, nickel superalloy, aluminum, chromium, iron, titanium, hafnium, alloys thereof, or any combination thereof, and a coating disposed on the surface, where the coating contains a nanolaminate film stack having two or more pairs of a first deposited layer and a second deposited layer. The first deposited layer contains chromium oxide, chromium nitride, aluminum oxide, aluminum nitride, or any combination thereof, the second deposited layer contains aluminum oxide, aluminum nitride, silicon oxide, silicon nitride, silicon carbide, yttrium oxide, yttrium nitride, yttrium silicon nitride, hafnium oxide, hafnium nitride, hafnium silicide, hafnium silicate, titanium oxide, titanium nitride, titanium silicide, titanium silicate, or any combination thereof, and the first deposited layer and the second deposited layer have different compositions from each other.
    Type: Application
    Filed: April 8, 2020
    Publication date: July 30, 2020
    Inventors: Yuriy MELNIK, Sukti CHATTERJEE, Kaushal GANGAKHEDKAR, Jonathan FRANKEL, Lance A. SCUDDER, Pravin K. NARWANKAR, David Alexander BRITZ, Thomas KNISLEY, Mark SALY, David THOMPSON
  • Patent number: 10633740
    Abstract: Protective coatings on an aerospace component and methods for depositing the protective coatings are provided. A method for depositing a coating on an aerospace component includes exposing an aerospace component to a first precursor and a first reactant to form a first deposited layer on a surface of the aerospace component by a chemical vapor deposition (CVD) process or a first atomic layer deposition (ALD) process and exposing the aerospace component to a second precursor and a second reactant to form a second deposited layer on the first deposited layer by a second ALD process, where the first deposited layer and the second deposited layer have different compositions from each other.
    Type: Grant
    Filed: March 18, 2019
    Date of Patent: April 28, 2020
    Assignee: APPLIED MATERIALS, INC.
    Inventors: Yuriy Melnik, Sukti Chatterjee, Kaushal Gangakhedkar, Jonathan Frankel, Lance A. Scudder, Pravin K. Narwankar, David Alexander Britz, Thomas Knisley, Mark Saly, David Thompson
  • Publication number: 20190284692
    Abstract: A gas distribution assembly for applying a coating on an interior of a plurality of components includes a support with a plurality of component cavities formed within the support. Each component cavity corresponds to a respective component to fluidly couple with an interior of the respective component. A first gas source flow line is fluidly coupled with each of the component cavities to provide a first gas from a first gas source to each of the component cavities, and a second gas source flow line is fluidly coupled with each of the component cavities to provide a second gas from a second gas source to each of the component cavities.
    Type: Application
    Filed: March 18, 2019
    Publication date: September 19, 2019
    Inventors: Yuriy MELNIK, Sukti CHATTERJEE, Kaushal GANGAKHEDKAR, Jonathan FRANKEL, Lance A. SCUDDER, Pravin K. NARWANKAR, David Alexander BRITZ, David Masayuki ISHIKAWA
  • Publication number: 20190284686
    Abstract: Embodiments of the present disclosure generally relate to protective coatings on an aerospace component and methods for depositing the protective coatings. In one or more embodiments, a method for depositing a coating on an aerospace component includes exposing an aerospace component to a first precursor and a first reactant to form a first deposited layer on a surface of the aerospace component by a chemical vapor deposition (CVD) process or a first atomic layer deposition (ALD) process and exposing the aerospace component to a second precursor and a second reactant to form a second deposited layer on the first deposited layer by a second ALD process, where the first deposited layer and the second deposited layer have different compositions from each other.
    Type: Application
    Filed: March 18, 2019
    Publication date: September 19, 2019
    Inventors: Yuriy MELNIK, Sukti CHATTERJEE, Kaushal GANGAKHEDKAR, Jonathan FRANKEL, Lance A. SCUDDER, Pravin K. NARWANKAR, David Alexander BRITZ, Thomas KNISLEY, Mark SALY, David THOMPSON
  • Publication number: 20190189399
    Abstract: Plasma is generated in a semiconductor process chamber by a plurality of microwave inputs with slow or fast rotation. Radial uniformity of the plasma is controlled by regulating the power ratio of a center-high mode and an edge-high mode of the plurality of microwave inputs into a microwave cavity. The radial uniformity of the generated plasma in a plasma chamber is attained by adjusting the power ratio for the two modes without inputting time-splitting parameters for each mode.
    Type: Application
    Filed: December 13, 2018
    Publication date: June 20, 2019
    Inventors: SATORU KOBAYASHI, LANCE SCUDDER, DAVID BRITZ, SOONAM PARK, DMITRY LUBOMIRSKY, HIDEO SUGAI
  • Publication number: 20190119810
    Abstract: Methods of removing native oxide layers and depositing dielectric layers having a controlled number of active sites on MEMS devices for biological applications are disclosed. In one aspect, a method includes removing a native oxide layer from a surface of the substrate by exposing the substrate to one or more ligands in vapor phase to volatize the native oxide layer and then thermally desorbing or otherwise etching the volatized native oxide layer. In another aspect, a method includes depositing a dielectric layer selected to provide a controlled number of active sites on the surface of the substrate. In yet another aspect, a method includes both removing a native oxide layer from a surface of the substrate by exposing the substrate to one or more ligands and depositing a dielectric layer selected to provide a controlled number of active sites on the surface of the substrate.
    Type: Application
    Filed: September 21, 2018
    Publication date: April 25, 2019
    Inventors: Ranga Rao ARNEPALLI, Colin Costano NEIKIRK, Yuriy MELNIK, Suresh Chand SETH, Pravin K. NARWANKAR, Sukti CHATTERJEE, Lance A. SCUDDER
  • Patent number: 10217838
    Abstract: A semiconductor structure includes first, second, and third transistor elements each having a first screening region concurrently formed therein. A second screening region is formed in the second and third transistor elements such that there is at least one characteristic of the screening region in the second transistor element that is different than the second screening region in the third transistor element. Different characteristics include doping concentration and depth of implant. In addition, a different characteristic may be achieved by concurrently implanting the second screening region in the second and third transistor element followed by implanting an additional dopant into the second screening region of the third transistor element.
    Type: Grant
    Filed: April 26, 2018
    Date of Patent: February 26, 2019
    Assignee: MIE FUJITSU SEMICONDUCTOR LIMITED
    Inventors: Dalong Zhao, Teymur Bakhishev, Lance Scudder, Paul E. Gregory, Michael Duane, U. C. Sridharan, Pushkar Ranade, Lucian Shifren, Thomas Hoffmann
  • Publication number: 20180261683
    Abstract: A semiconductor structure includes first, second, and third transistor elements each having a first screening region concurrently formed therein. A second screening region is formed in the second and third transistor elements such that there is at least one characteristic of the screening region in the second transistor element that is different than the second screening region in the third transistor element. Different characteristics include doping concentration and depth of implant.
    Type: Application
    Filed: April 26, 2018
    Publication date: September 13, 2018
    Applicant: Mie Fujitsu Semiconductor Limited
    Inventors: Dalong Zhao, Teymur Bakhishev, Lance Scudder, Paul E. Gregory, Michael Duane, U.C. Sridharan, Pushkar Ranade, Lucian Shifren, Thomas Hoffmann
  • Patent number: 10014387
    Abstract: A semiconductor structure includes first, second, and third transistor elements each having a first screening region concurrently formed therein. A second screening region is formed in the second and third transistor elements such that there is at least one characteristic of the screening region in the second transistor element that is different than the second screening region in the third transistor element. Different characteristics include doping concentration and depth of implant. In addition, a different characteristic may be achieved by concurrently implanting the second screening region in the second and third transistor element followed by implanting an additional dopant into the second screening region of the third transistor element.
    Type: Grant
    Filed: February 18, 2016
    Date of Patent: July 3, 2018
    Assignee: MIE FUJITSU SEMICONDUCTOR LIMITED
    Inventors: Dalong Zhao, Teymur Bakhishev, Lance Scudder, Paul E. Gregory, Michael Duane, U. C. Sridharan, Pushkar Ranade, Lucian Shifren, Thomas Hoffmann
  • Publication number: 20180148832
    Abstract: In some embodiments, a method of processing a substrate disposed within a processing volume of a hot wire chemical vapor deposition (HWCVD) process chamber, includes: (a) providing a carbon containing precursor gas into the processing volume, the carbon containing precursor gas being provided into the processing volume from an inlet located a first distance above a surface of the substrate; (b) breaking hydrogen-carbon bonds within molecules of the carbon containing precursor via introduction of hydrogen radicals to the processing volume to deposit a flowable carbon layer atop the substrate, wherein the hydrogen radicals are formed by flowing a hydrogen containing gas over a plurality of filaments disposed within the processing volume above the substrate and the inlet.
    Type: Application
    Filed: November 1, 2017
    Publication date: May 31, 2018
    Inventors: Sukti CHATTERJEE, LANCE SCUDDER, ERIC H. LIU, PRAVIN K. NARWANKAR, PRAMIT MANNA, ABHIJIT MALLICK
  • Publication number: 20180148833
    Abstract: In some embodiments, a method of processing a substrate disposed within a processing volume of a hot wire chemical vapor deposition (HWCVD) process chamber, includes: (a) providing a silicon containing precursor gas into the processing volume, the silicon containing precursor gas is provided into the processing volume from an inlet located a first distance above a surface of the substrate; (b) breaking hydrogen-silicon bonds within molecules of the silicon containing precursor via introduction of hydrogen radicals to the processing volume to deposit a flowable silicon containing layer atop the substrate, wherein the hydrogen radicals are formed by flowing a hydrogen containing gas over a plurality of wires disposed within the processing volume above the substrate and the inlet.
    Type: Application
    Filed: November 1, 2017
    Publication date: May 31, 2018
    Inventors: Sukti CHATTERJEE, LANCE SCUDDER, ERIC H. LIU, PRAVIN K. NARWANKAR, PRAMIT MANNA, ABHIJIT MALLICK
  • Patent number: 9812550
    Abstract: A semiconductor structure includes first, second, and third transistor elements each having a first screening region concurrently formed therein. A second screening region is formed in the second and third transistor elements such that there is at least one characteristic of the screening region in the second transistor element that is different than the second screening region in the third transistor element. Different characteristics include doping concentration and depth of implant. In addition, a different characteristic may be achieved by concurrently implanting the second screening region in the second and third transistor element followed by implanting an additional dopant into the second screening region of the third transistor element.
    Type: Grant
    Filed: January 30, 2017
    Date of Patent: November 7, 2017
    Assignee: Mie Fujitsu Semiconductor Limited
    Inventors: Dalong Zhao, Teymur Bakhishev, Lance Scudder, Paul E. Gregory, Michael Duane, U. C. Sridharan, Pushkar Ranade, Lucian Shifren, Thomas Hoffmann
  • Patent number: 9793172
    Abstract: A method for fabricating field effect transistors using carbon doped silicon layers to substantially reduce the diffusion of a doped screen layer formed below a substantially undoped channel layer includes forming an in-situ epitaxial carbon doped silicon substrate that is doped to form the screen layer in the carbon doped silicon substrate and forming the substantially undoped silicon layer above the carbon doped silicon substrate. The method may include implanting carbon below the screen layer and forming a thin layer of in-situ epitaxial carbon doped silicon above the screen layer. The screen layer may be formed either in a silicon substrate layer or the carbon doped silicon substrate.
    Type: Grant
    Filed: October 20, 2016
    Date of Patent: October 17, 2017
    Assignee: Mie Fujitsu Semiconductor Limited
    Inventors: Lance Scudder, Pushkar Ranade, Charles Stager, Urupattur C. Sridharan, Dalong Zhao