Abstract: One embodiment relates to a computer method of evaluating proposed edits to a target layer of an integrated circuit. In the method, a number of editable regions is determined for metal layers overlying the target layer, where an editable region for a metal layer is laterally arranged between segments of the metal layer. The method identifies a number of possible vertical milling paths that extend from an exterior surface of the integrated surface to the target layer. Each possible vertical milling path passes through at least one editable region. The method generates a number of possible edit plans that are based on both the proposed edits and the number of possible vertical milling paths, where each edit plan places edits in a different combination of possible vertical milling paths.

Abstract: A system and method which stores a three dimensional physical representation of an electrical circuit such as an integrated circuit design uses a database having a plurality of files to store active trace data and inactive feature data (layout data). The data from each file can be cross mapped with schematic data. A netlist or some other correlation method can be used to correlate the data from each of the individual files such that the leads of the layout data are correlated to leads from a schematic to maintain compatibility between the netlist and the layout data. Segmenting data into individual files decreases load times while correlating data with the netlist ensures electrical data is valid and suitable for characterization and optimization of the layout data. Various other embodiments are also described.

Abstract: One embodiment relates to a computer method of evaluating proposed edits to a target layer of an integrated circuit. In the method, a number of editable regions is determined for metal layers overlying the target layer, where an editable region for a metal layer is laterally arranged between segments of the metal layer. The method identifies a number of possible vertical milling paths that extend from an exterior surface of the integrated surface to the target layer. Each possible vertical milling path passes through at least one editable region. The method generates a number of possible edit plans that are based on both the proposed edits and the number of possible vertical milling paths, where each edit plan places edits in a different combination of possible vertical milling paths.

Abstract: A system and method which stores a three dimensional physical representation of an electrical circuit such as an integrated circuit design uses a database having a plurality of files to store active trace data and inactive feature data (layout data). The data from each file can be cross mapped with schematic data. A netlist or some other correlation method can be used to correlate the data from each of the individual files such that the leads of the layout data are correlated to leads from a schematic to maintain compatibility between the netlist and the layout data. Segmenting data into individual files decreases load times while correlating data with the netlist ensures electrical data is valid and suitable for characterization and optimization of the layout data. Various other embodiments are also described.