Abstract: Example printed board assembly (PBA) interfaces are described. In some examples, the disclosure relates to a printed board (PB) including a conductive layer, where the PB defines a first surface and a recess in the first surface, where a surface defining the recess is at least one of electrically or thermally connected to the conductive layer, and an electrical component body mounted on the PB. The electrical component body may be mounted on the PB such that a surface of the electrical component body extends over at least a portion of the recess, where the recess extends beyond the electrical component body such that the recess defines an aperture for introducing an interface material between the surface of the electrical component body and the surface of the recess.

Abstract: A magnetoresistive bridge nonvolatile memory device having a flat, continuous folded closed magnetic loop, the magnetic loop having a side for holding four sense metal terminated magnetic shunts, and four planar central parallel rectangular giant magnetoresistive GMR resistors, each of the four central parallel rectangular giant magnetoresistive GMR resistors being located on the side of the continuous folded closed magnetic loop between each of two of the sense metal terminated magnetic shunts, each two of the four sense metal terminated magnetic shunts electrically connected to adjacent ends of a central parallel rectangular giant magnetoresistive GMR resistor.

Abstract: An assembly includes a toroidal induction component, a potting cup, and potting material. The toroidal induction component includes a conductive winding, where at least ends of the conductive winding define a lead set of the toroidal induction component. The potting cup is configured to accept the toroidal induction component and its lead set. Techniques for forming the assembly are also described.

Abstract: A nonvolatile loop magnetic memory having a magnetically writeable nonvolatile magnetic memory element and a loop magnetic shunt. The loop magnetic shunt has a slot through a loop of the loop magnetic shunt, the slot forming first and second ends in the loop magnetic shunt, the first and second ends arranged to focus a magnetic field on the magnetically writeable nonvolatile magnetic memory element. The magnetically writeable nonvolatile magnetic memory element is located between the first and second ends of the loop magnetic shunt. A magnetic write coil is wrapped around the loop magnetic shunt.

Abstract: Thermal management features are described for use with electrical components. In some examples, an assembly includes a printed board that includes a thermally conductive thermal attach pad thermally connected to a heat sink, an electrically conductive attach pad that is separate from the thermally conductive attach pad, and an electrically conductive trace electrically connected to the electrically conductive attach pad. An electrical component can be electrically connected to the electrically conductive attach pad and the electrically conductive trace of the printed board. A thermal interface material is disposed adjacent at least a portion of a side surface of the electrical component and in contact with the thermally conductive attach pad. In this manner, the assembly may provide a thermally conductive pathway from an electrical component to the heat sink.

Abstract: An assembly includes a toroidal induction component, a potting cup, and potting material. The toroidal induction component includes a conductive winding, where at least ends of the conductive winding define a lead set of the toroidal induction component. The potting cup is configured to accept the toroidal induction component and its lead set. Techniques for forming the assembly are also described.

Abstract: Thermal management features are described for use with electrical components. In some examples, an assembly includes a printed board that includes a thermally conductive thermal attach pad thermally connected to a heat sink, an electrically conductive attach pad that is separate from the thermally conductive attach pad, and an electrically conductive trace electrically connected to the electrically conductive attach pad. An electrical component can be electrically connected to the electrically conductive attach pad and the electrically conductive trace of the printed board. A thermal interface material is disposed adjacent at least a portion of a side surface of the electrical component and in contact with the thermally conductive attach pad. In this manner, the assembly may provide a thermally conductive pathway from an electrical component to the heat sink.

Abstract: Systems and methods for printed board assembly isolated heat exchange are provided. In one embodiment, a printed board assembly comprises: at least one electrical power layer; at least one electrical ground layer; a first signal layer having a first signal routing area providing electrical trace connections for signals and a first heat exchange chassis fill conductor area located adjacent to a periphery of the first signal routing area; at least one thermal interface coupled to a chassis for conducting heat from the printed board assembly to the chassis; and at least one via conductively coupling the first heat exchange chassis fill conductor area to the at least one thermal interface.

Abstract: Systems and methods for printed board assembly isolated heat exchange are provided. In one embodiment, a printed board assembly comprises: at least one electrical power layer; at least one electrical ground layer; a first signal layer having a first signal routing area providing electrical trace connections for signals and a first heat exchange chassis fill conductor area located adjacent to a periphery of the first signal routing area; at least one thermal interface coupled to a chassis for conducting heat from the printed board assembly to the chassis; and at least one via conductively coupling the first heat exchange chassis fill conductor area to the at least one thermal interface.

Abstract: A magnetoresistive resistor memory cell having four individually polarizable magnetoresistive resistors that form a magnetoresistive bridge circuit. Each of the four magnetoresistive resistors is surrounded by a write trace segment pair. One upper write trace segment is directly above a magnetoresistive resistor and one lower write trace segment is directly below that resistor. The two write traces of a write trace segment pair are oriented at 90 degrees relative to the anisotropic axis, that is, the length, of the magnetoresistive resistor. The combination of the magnetoresistive resistor bridge circuit and four write trace segment pairs forms a magnetoresistive resistor memory cell.

Abstract: Radiation hardening, detection and protection design methods are disclosed. An example write drive circuit is disclosed having radiation hardened analog circuitry. A passive transistor is provided to generate a radiation photo-current to offset any net radiation photo-current of the operational circuitry. Using this technique, a radiation hardened reference-mirror control circuit provides a switched write current for setting the logical state of MRAM bits during a radiation event, for instance. A radiation detector and radiation hardened logic gates are further provided for inhibiting the write current when a radiation level is above a predetermined level.

Abstract: An integrated circuit package is provided. The package comprises a lid which is adapted to cover an integrated circuit, the lid is further adapted to provide bypass capacitance to the integrated circuit.

Abstract: A method of coupling an integrated circuit (IC) assembly to a printed wiring board (PWB) is provided. The method comprises applying a solder paste to at least one IC assembly interfacial attach pad having a first size on a surface of the IC assembly and applying a solder paste to at least one PWB interfacial attach pad having a second size on a surface of the PWB. The method also comprises reflow attaching the at least one IC assembly interfacial attach pad to the at least one PWB interfacial attach pad, wherein the difference between the size of the at least one PWB interfacial attach pad and the size of the at least one IC assembly interfacial attach pad substantially inhibits self-alignment and lift-off forces.

Abstract: In one aspect, the present invention provides interposers that can mechanically, electrically, and thermally interconnect first and second microelectronic components. An interposer in accordance with the present invention includes a substrate, preferably flexible, having first and second oppositely facing surfaces. Such interposers also include an array of links traversing from the first surface of the substrate to the second surface of the substrate. In accordance with the present invention, each link preferably comprises a buried portion positioned between the first and second surfaces of the substrate. In other aspects of the present invention, microelectronic assemblies having first and second microelectronic components interconnected by an interposer and methods of interconnecting such components are provided.

Abstract: Methods and systems are provided for testing circuits having electronic devices. In one embodiment, an electronic device test adapter comprises a base interface section, at least one test interface section, and at least one flexible section. The base interface section includes a device side attach pad interface and a printed wiring assembly side attach pad interface. The base interface section is adapted to mount onto a printed wiring assembly device. The device side attach pad interface and the printed wiring assembly side attach pad interface are adapted to communicate one or more signals between the electronic device and the printed wiring assembly device. The at least one test interface section includes a testing interface, wherein the base interface section, the at least one flexible section, and the at least one test interface section are adapted to communicate the one or more signals communicated between the electronic device and the printed wiring assembly device to the testing interface.

Abstract: Chip and wire and flip chip compatible die stack capacitors (“stack caps”), die stack assemblies and die stack assembly methods are disclosed. Each stack cap includes a plurality of multilayer sections. Each multilayer section is fabricated separately, and the sections are then bonded or integrated together. As illustrative examples, stack cap formats with peripheral ring wire bond terminals or interfacial attach pad terminals along with their associated die stack assemblies and assembly methods are disclosed. Each stack cap is attached directly to the IC die that it bypasses. The respective peripheral power, ground and signal bond pads of each bonded stack cap and die pair and the host substrate are connected with bond wires.

Abstract: An electronic assembly apparatus is provided which has a chassis for housing at least one circuit board. The circuit board has at least one major surface. The chassis has at least one wall juxtapositioned along at least a portion of the major surface of the circuit board. The assembly also has at least one circuit board support member. The support member has a first end mechanically coupled to the major circuit board surface at an area between the first and second ends of the circuit board. The support member also has a second end mechanically coupled to the wall of the chassis. Another support member can be mechanically coupled between another major surface of the circuit board and another wall of the chassis. The support member or members provides support to the circuit board at an area between the first and second ends of the circuit board.

Abstract: A chip capacitor that includes a first and second terminal and a plurality of first and second conductive plates. The first terminal has a first interfacial attachment area that is adapted to be attached to a host substrate. The second terminal has a second interfacial attachment area also adapted to be attached to a host substrate. The first interfacial attachment area and the second interfacial attachment area separated by at least one relatively thin isolation strip such that the first and second interfacial attachment areas generally approach covering the entire attaching area of the chip capacitor. The plurality of first conductive plates are coupled to the first terminal and the plurality of second plates are coupled to the second terminal. In one embodiment, approximately 50% of the periphery of each first and second conductive plate is coupled to the respective first and second terminals.

Abstract: An electronic assembly apparatus is provided which has a chassis for housing at least one circuit board. The circuit board has at least one major surface. The chassis has at least one wall juxtapositioned along at least a portion of the major surface of the circuit board. The assembly also has at least one circuit board support member. The support member has a first end mechanically coupled to the major circuit board surface at an area between the first and second ends of the circuit board. The support member also has a second end mechanically coupled to the wall of the chassis. Another support member can be mechanically coupled between another major surface of the circuit board and another wall of the chassis. The support member or members provides support to the circuit board at an area between the first and second ends of the circuit board.

Abstract: Parallel surfaces are interfacially mechanically bonded and optionally electrically, and/or thermally connected using an interposer fabricated from a flexible laminates, such as flex PWB. The bond/connection points for the device made on one side of the interposer are displaced in the X and Y axis from the bond/connection points on the other or obverse side for the interposer and the board. The optional electrical/thermal connection through the interposer is made through one or more traces and vias in the flex board.