Abstract: A method of coupling an integrated circuit (IC) assembly to a printed wiring board (PWB) is provided. The method comprises applying a solder paste to at least one IC assembly interfacial attach pad having a first size on a surface of the IC assembly and applying a solder paste to at least one PWB interfacial attach pad having a second size on a surface of the PWB. The method also comprises reflow attaching the at least one IC assembly interfacial attach pad to the at least one PWB interfacial attach pad, wherein the difference between the size of the at least one PWB interfacial attach pad and the size of the at least one IC assembly interfacial attach pad substantially inhibits self-alignment and lift-off forces.

Abstract: An improved Helmholtz coil system is disclosed, which allows testing of components in a uniform DC or AC magnetic field with precise and repeatable positioning and orientation over 360 degrees of angular displacement about each of the x, y and z planes. For example, a 3-gimbaled Helmholtz coil system is disclosed, which includes a base plate that supports two coils arranged on a common axis and perpendicular to the base, and a system of three gimbals arranged in proximity to, but not necessarily located within, the magnetic field between the two coils. The gimbaled system includes an outer mount that is arranged perpendicular to the base plate and substantially intersects the center of the magnetic field. The gimbaled system includes three lockable gimbals, which can rotate on axes at right angles with respect to each other so as to allow a full 360 degrees of angular displacement in the x, y and z planes and also be locked for stabilization at any position therebetween.

Abstract: In one aspect, the present invention provides interposers that can mechanically, electrically, and thermally interconnect first and second microelectronic components. An interposer in accordance with the present invention includes a substrate, preferably flexible, having first and second oppositely facing surfaces. Such interposers also include an array of links traversing from the first surface of the substrate to the second surface of the substrate. In accordance with the present invention, each link preferably comprises a buried portion positioned between the first and second surfaces of the substrate. In other aspects of the present invention, microelectronic assemblies having first and second microelectronic components interconnected by an interposer and methods of interconnecting such components are provided.

Abstract: Radiation hardening, detection and protection design methods are disclosed. An example write drive circuit is disclosed having radiation hardened analog circuitry. A passive transistor is provided to generate a radiation photo-current to offset any net radiation photo-current of the operational circuitry. Using this technique, a radiation hardened reference-mirror control circuit provides a switched write current for setting the logical state of MRAM bits during a radiation event, for instance. A radiation detector and radiation hardened logic gates are further provided for inhibiting the write current when a radiation level is above a predetermined level.

Abstract: Methods and systems are provided for testing circuits having electronic devices. In one embodiment, an electronic device test adapter comprises a base interface section, at least one test interface section, and at least one flexible section. The base interface section includes a device side attach pad interface and a printed wiring assembly side attach pad interface. The base interface section is adapted to mount onto a printed wiring assembly device. The device side attach pad interface and the printed wiring assembly side attach pad interface are adapted to communicate one or more signals between the electronic device and the printed wiring assembly device. The at least one test interface section includes a testing interface, wherein the base interface section, the at least one flexible section, and the at least one test interface section are adapted to communicate the one or more signals communicated between the electronic device and the printed wiring assembly device to the testing interface.

Abstract: An integrated circuit package is provided. The package comprises a lid which is adapted to cover an integrated circuit, the lid is further adapted to provide bypass capacitance to the integrated circuit.

Abstract: A magnetoresistive memory cell and array are provided for nonvolatile storage of binary information. According to an embodiment, a memory cell has a ring-shaped magnetoresistive multilayer element (or bit). A plurality of vias pass through a center hole in the ring-shaped element. Each end of each via is coupled with a separate write-read line segment that extends radially from the center hole past a perimeter of the ring-shaped element. The write-read lines are configured to generate magnetic fields for switching a magnetization direction of one or more layers of the ring-shaped bits in the array.

Abstract: A leadframe for an electronic package is provided. The lead frame includes a plurality of leads each having an outer lead bond and an inner lead bond. The plurality of leads are interconnected by a tie bar. The plurality of leads have a first pitch at an exit or attach point for an electronic package and a second, larger pitch at the outer lead bonds.

Abstract: Methods and systems are provided for protecting an electronic device from electrostatic discharge when inserting and removing the electronic device from ESD foam. In one embodiment, an ESD foam ground clip is presented. The clip comprises a low-impedance contact and a ground connector adapted to electrically connect the low-impedance contact to an electrical ground.

Abstract: An ESD protection system for an IC device. An ESD protection circuit is comprised of a plurality of resistors and a common ground bus. The first terminal of each resistor is coupled to an associated pin of an IC device while the second terminal of each resistor is coupled to the common ground bus. The common ground bus is coupled with a reference ground. A clip holds the ESD protection circuit to pins of the IC device. As the IC device is transported, the present invention maintains a continuous controlled DC path to reference ground on every pin of the IC device, thus preventing damaging electrostatic charges from accumulating on the IC device pins, or discharging through the IC device.

Abstract: A magnetoresistive memory cell and array are provided for nonvolatile storage of binary information. According to an embodiment, a memory cell has a ring-shaped magnetoresistive multilayer element (or bit). A plurality of vias pass through a center hole in the ring-shaped element. Each end of each via is coupled with a separate write-read line segment that extends radially from the center hole past a perimeter of the ring-shaped element. The write-read lines are configured to generate magnetic fields for switching a magnetization direction of one or more layers of the ring-shaped bits in the array.