Patents by Inventor Landon Hanks

Landon Hanks has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20230137619
    Abstract: A circuit board includes vias with a coil structure. A circuit board includes vias with barrels that extend vertically through the circuit board and pads in different planes of the circuit board, such as the top surface and bottom surface, and optionally in an inner routing layer. The coil structure is a coil of conductor in a plane of the circuit board, electrically connected to a pad in that plane, which is electrically connected to the barrel. The coil structure provides self-inductance around the pad, which brings up the reactive impedance of the via to balance the capacitive reactance of the via.
    Type: Application
    Filed: December 23, 2022
    Publication date: May 4, 2023
    Inventors: Landon HANKS, Xiang LI
  • Publication number: 20230046581
    Abstract: An apparatus and method for reducing differential cross-talk in a pin arrangement of a socket are described. Socket pins within a differential pair use a modified shape to tighten the intra-pair pin coupling to reduce the crosstalk without changing the pin map. The middle vertical segment of one pin of a diagonally adjacent differential pin pair is modified to be closer to the other pin than other corresponding locations of the pins. The spring beam that extends from the middle vertical segment of the one pin is modified to accommodate the package landing pad that the spring beam contacts to maintain a uniform pitch.
    Type: Application
    Filed: April 25, 2022
    Publication date: February 16, 2023
    Inventors: Xiang Li, Shaohua Li, Landon Hanks, Kai Xiao, Mo Liu, Jingbo Li
  • Publication number: 20220418090
    Abstract: Examples described herein relate to a system that includes: a circuit board comprising a plurality of layers, first and second conductive connections, first and second trace portions, first, second, and third routings, and a via wherein: the first conductive connection is coupled to the first trace portion, the second conductive connection is coupled to the second trace portion, the first routing is formed in a first layer of the plurality of layers, the second routing is formed in a second layer of the plurality of layers, the third routing is formed in the first layer of the plurality of layers, a portion of the first routing overlaps with a portion of the second routing to provide a capacitive region, and the via conductively couples a portion of the second routing overlaps with a portion of the third routing.
    Type: Application
    Filed: August 26, 2022
    Publication date: December 29, 2022
    Inventors: Landon HANKS, Xiang LI, George VERGIS, James A. McCALL
  • Publication number: 20220304142
    Abstract: Examples described herein relate to a system that includes: a circuit board comprising a plurality of layers and at least one conductive connection. In some examples, the at least one conductive connection is connected to a layer of the plurality of layers. In some examples, at least one layer of the plurality of layers comprises a conductive material. In some examples, the at least two layers of the plurality of layers comprise conductive material that extend in an axis towards the at least one conductive connection but do not overlap with the at least one layer of the plurality of layers comprising the conductive material.
    Type: Application
    Filed: June 3, 2022
    Publication date: September 22, 2022
    Inventors: Xiang LI, Landon HANKS, George VERGIS, James A. McCALL
  • Publication number: 20220263262
    Abstract: Examples described herein relate to a system that includes: a first signal pin and a first ground pin adjacent to the first signal pin. In some examples, the first signal pin comprises a first portion, a second portion, and a third portion. In some examples, the first ground pin comprises a first portion, a second portion, and a third portion, the second portion of the first signal pin comprises a vertical mount, the second portion of the first ground pin comprises a vertical mount, and the second portion of the first signal pin and the second portion of the first ground pin are arranged proximate one another.
    Type: Application
    Filed: May 5, 2022
    Publication date: August 18, 2022
    Inventors: Landon HANKS, Xiang LI, George VERGIS, James A. McCALL
  • Publication number: 20220217846
    Abstract: An embodiment of an electronic apparatus comprises a circuit board, one or more memory devices affixed to a top side of the circuit board, and one or more board-to-board connectors affixed to a bottom side of the circuit board to provide an external connection to signals of the one or more memory devices, where the one or more board-to-board connectors are located inward from outermost edges of the circuit board and where a first footprint defined by an outermost boundary of the one or more board-to-board connectors is substantially a same size as or smaller than a second footprint defined by an outermost boundary of the one or more memory devices. Other embodiments are disclosed and claimed.
    Type: Application
    Filed: March 22, 2022
    Publication date: July 7, 2022
    Applicant: Intel Corporation
    Inventors: Xiang Li, Konika Ganguly, George Vergis, Stephen Christianson, Xiaopeng Dong, Landon Hanks