Abstract: A system timer controls the timing at which a mobile communication device communicates with a base station. The system timer includes a sequencer that executes a set of instructions stored in a sequencer RAM thereby causing a set of control signals to be supplied to a set of components residing in the mobile communication device including, a set of RF hardware devices, a microprocessor and a digital signal processor. The microprocessor or the digital signal processor may alter the order in which the instructions are executed by the sequencer thereby allowing the mobile communication device to communicate in a dynamic multi-slot communication environment. The system timer may include a timebase counter used to synchronize the timing of the mobile communication device with the timing of the base station. A value stored in the timebase counter is incremented at a predefined rate and the value stored in the timebase counter wraps to zero upon reaching a predefined value.

Abstract: A system timer for controlling the timing at which a communication device communications. The system timer can include a memory device and a processor. The memory device can be adapted to store a set of software instructions which can be executed by the processor in any of a plurality of sequences. Each sequence can cause the processor to generate a corresponding set of control signals adapted to enable the communication device to communicate in one of a multiplicity of communication formats. Each communication format can device the timing at which a set of data is communicated by the communication. The plurality of sequences in which the processor executes the software instructions can be controlled by a second processor in the communication device.

Abstract: A system timer controls the timing at which a mobile communication device communicates with a base station. The system timer includes a sequencer that executes a set of instructions stored in a sequencer RAM thereby causing a set of control signals to be supplied to a set of components residing in the mobile communication device including, a set of RF hardware devices, a microprocessor and a digital signal processor. The microprocessor or the digital signal processor may alter the order in which the instructions are executed by the sequencer thereby allowing the mobile communication device to communicate in a dynamic multi-slot communication environment. The system timer may include a timebase counter used to synchronize the timing of the mobile communication device with the timing of the base station. A value stored in the timebase counter is incremented at a predefined rate and the value stored in the timebase counter wraps to zero upon reaching a predefined value.