Abstract: A pixel circuit and a driving method therefor, a display panel, and a display device are provided. In the pixel circuit, a control terminal of the driving circuit is connected with the storage circuit at a first node, and the first light emission control circuit is connected with the first terminal of the driving circuit at a second node. The method includes: before a data writing phase, the first reset circuit turning on to reset the first node, and the first light emission control circuit turning on to reset the second node; during the data writing phase, the data writing circuit turning on, so as to write the data signal into the first terminal of the driving circuit; and during a light emitting phase, the first light emission control circuit turning on, and the light emitting element emitting light according to the drive current.

Abstract: Disclosed is a display substrate including a plurality of circuit units, a circuit unit includes a pixel drive circuit, the pixel drive circuit includes a first storage capacitor and a second storage capacitor, a second end of the first storage capacitor is connected with a second end of the second storage capacitor, the first storage capacitor includes at least two first capacitor electrode plates, orthographic projections of the two first capacitor electrode plates on a plane of the display substrate are at least partially overlapped, the second storage capacitor includes at least two second capacitor electrode plates, orthographic projections of the two second capacitor electrode plates on the plane of the display substrate are at least partially overlapped; in a direction perpendicular to the display substrate, the display substrate includes a first conductive layer, a second conductive layer, and a third conductive layer disposed on a base substrate.

Abstract: A display substrate includes a plurality of circuit units, wherein a circuit unit includes a pixel drive circuit, and the pixel drive circuit at least includes a plurality of transistors. In a plane perpendicular to the display substrate, the circuit unit includes a semiconductor layer disposed on a substrate, the semiconductor layer at least includes a first active pattern and a second active pattern, the first active pattern includes an active layer of at least one transistor, the second active pattern includes an active layer of at least one transistor.

Abstract: Disclosed are a display substrate, a display apparatus and an electronic apparatus, the display substrate includes a base substrate and a plurality of sub-pixels disposed on the base substrate, at least one sub-pixel includes a pixel drive circuit, at least one pixel drive circuit includes a plurality of first-type transistors (M1) and a plurality of second-type transistors (M2), an orthographic projection of at least one first-type transistor (M1) on the base substrate is at least partially overlapped with an orthographic projection of at least one second-type transistor (M2) on the base substrate.

Abstract: A display substrate and a display device are provided. The display substrate includes a pixel driving circuit, the pixel driving circuit includes a first storage capacitor, a second storage capacitor, at least one shield electrode, and at least one double-gate structured transistor; the first storage capacitor at least includes a first electrode plate (71) and a third electrode plate (73), and an orthographic projection of the first electrode plate (71) on the base substrate at least partially overlaps with an orthographic projection of the third electrode plate (73) on the base substrate; the second storage capacitor at least includes a second electrode plate (72) and a fourth electrode plate (74), and an orthographic projection of the second electrode plate (72) on the base substrate at least partially overlaps with an orthographic projection of the fourth electrode plate (74) on the base substrate.

Abstract: A method, a device, a storage medium, and electronic equipment for detecting pipe wall dirt are provided. In the above, the electronic equipment acquires a first receiving amount of a target pipeline for first light quanta currently; acquires a second receiving amount of the target pipeline for the first light quanta at a reference moment; and obtains an increased dirt thickness of the target pipeline in a target time period according to the first receiving amount and the second receiving amount, wherein the target time period represents a time length from a current moment to the reference moment.

Abstract: Disclosed are a display substrate and a manufacturing method therefor, and a display apparatus. The display substrate includes a plurality of circuit units forming a plurality of unit rows and a plurality of unit columns, at least one circuit unit includes a pixel drive circuit and a plurality of scan signal lines connected to the pixel drive circuit, the pixel drive circuit at least includes a plurality of transistors; in the direction perpendicular to the display substrate, the display substrate at least includes a first gate metal layer (GATE 1) arranged on the substrate (101) and a first source drain metal layer (SD1) arranged on a side of the first gate metal layer (GATE 1) away from the substrate (101), a gate electrode of at least one transistor is arranged in the first gate metal layer (GATE 1).

Abstract: A display substrate includes multiple circuit units, a first power supply connection line, a second power supply connection line, a first power supply line, and a second power supply line, a circuit unit includes a pixel drive circuit, the first power supply line is connected to the pixel drive circuit, and is connected to the first power supply connection line, and the second power supply line is connected to the second power supply connection line; the pixel drive circuit includes a first shielding electrode and at least one transistor with a double-gate structure, an orthographic projection of the first shielding electrode on the base substrate is at least partially overlapped with that of a node between two gate electrodes of a transistor with the double-gate structure on the base substrate; the first shielding electrode is connected to a first power supply connection line or a second power supply connection line.

Abstract: A display substrate includes a plurality of circuit units. Each circuit unit includes a pixel driving circuit. The pixel driving circuit at least includes a first transistor, a second transistor, a third transistor, a fourth transistor, a ninth transistor, and a first storage capacitor. A second electrode of the first transistor is connected to a first electrode of the second transistor, the gate electrode of the third transistor, and a first end of the first storage capacitor, respectively. A second electrode of the fourth transistor is connected to a second electrode of the ninth transistor and a second end of the first storage capacitor. The first transistor and the second transistor are located on a same side of the driving transistor in a unit column direction.

Abstract: Disclosed are a display substrate, a preparation method therefor and a display apparatus. The display substrate includes a shielding conductive layer and a functional structure layer, wherein the shielding conductive layer at least includes a first connection line, and the functional structure layer at least includes a data signal line and a second connection line; in a plane parallel to the display substrate, the display substrate includes a plurality of circuit units forming a plurality of unit rows and a plurality of unit columns, at least one circuit unit includes a pixel driving circuit, the data signal line is connected to a plurality of pixel driving circuits of one unit column, the data signal line is configured to provide a data signal to the pixel driving circuit; the second connection line is connected with the first connection line, and the data signal line is connected with the second connection line.

Abstract: Disclosed are a display substrate, a manufacturing method therefor, and a display apparatus. The display substrate includes a plurality of circuit units, at least one circuit unit includes a pixel drive circuit, the pixel drive circuit includes, at least, a first storage capacitor and a second storage capacitor, the first storage capacitor includes at least two first capacitor plates, orthographic projections of the two first capacitor plates on a substrate are overlapped, at least partially, with each other, the second storage capacitor includes at least two second capacitor plates, orthographic projections of the two second capacitor plates on the substrate are overlapped, at least partially, with each other.

Abstract: A pixel driving circuit includes: a driving transistor, a data write circuit, a threshold compensation circuit, a first capacitor, and a second capacitor. A gate of the driving transistor is coupled to a first node, a first electrode is coupled to a second node, and a second electrode is coupled to a third node. The data write circuit is configured to transmit a signal of a data signal terminal to the second node in response to a signal of a first gate driving signal terminal. The threshold compensation circuit is configured to communicate the first node with the third node in response to a signal of a second gate driving signal terminal. The first capacitor is coupled between the first node and the first gate driving signal terminal. The second capacitor is coupled between the first node and the second gate driving signal terminal.

Abstract: An array substrate is provided. The array substrate includes a plurality of pixel driving circuits. A respective pixel driving circuit of the plurality of pixel driving circuits comprises a driving transistor, a light shield, and a node connecting line. An orthographic projection of the light shield on a base substrate substantially covers an orthographic projection of an active layer of the driving transistor on the base substrate. The light shield is electrically connected to a gate electrode of the driving transistor through the node connecting line. The light shield, the node connecting line, and the gate electrode of the driving transistor are in three different layers.

Abstract: The present disclosure relates to a PKMYT1 inhibitor compound represented by formula (I) or a pharmaceutically acceptable salt thereof, a preparation method therefor, a pharmaceutical composition containing the compound or the pharmaceutically acceptable salt thereof, and use thereof in preventing or treating a PKMYT1-related disease. X1 to X5, R1 to R4, R7, and R8 in formula (I) are as defined in the specification.

Abstract: A train operation scenario general simulation method. By means of a Redis lightweight message publishing and subscription mechanism and the high performance of a memory database, database storage access and message communication functions are combined into one, and the execution of simulation scenarios is synchronized in real time while simulating the running state of a train, thus realizing the rapid construction of a train operation simulation system. Compared with the prior art, the present disclosure simplifies the system structure, guarantees the data consistency and high-speed access, optimizes the network communication efficiency, realizes decoupling between applications (system), also avoids the system complexity caused by network isolation and inconsistent development languages, and improves the deployment convenience and operation stability of a simulation system. Further provided are a train operation scenario general simulation system, a device and a medium.

Abstract: A display substrate includes a plurality of circuit units. Each circuit unit includes a pixel driving circuit. The pixel driving circuit at least includes a first transistor, a second transistor, a third transistor, a fourth transistor, a ninth transistor, a first storage capacitor and a second storage capacitor. A second electrode of the first transistor is connected to a first electrode of the second transistor, the gate electrode of the third transistor, and a first end of the first storage capacitor, respectively. A second electrode of the fourth transistor is connected to a second electrode of the ninth transistor, a second end of the first storage capacitor, and a second end of the second storage capacitor, respectively.

Abstract: An array substrate includes a plurality of pixel driving circuits and a plurality of third control signal lines. A respective pixel driving circuit includes a data write transistor, a compensating transistor, a third reset transistor, a first capacitor having a first capacitor electrode and a second capacitor electrode, a second capacitor having a third capacitor electrode and a fourth capacitor electrode, and a third node connecting line. A respective third control signal line is configured to provide control signals to a gate electrode of the third reset transistor. The third node connecting line is connected to second electrodes of the compensating transistor and the data write transistor, and to the first capacitor electrode and the fourth capacitor electrode. An orthographic projection of the third node connecting line on a base substrate at least partially overlaps with an orthographic projection of the respective third control signal line on the base substrate.

Abstract: A pixel driving circuit includes: a driving transistor, a data write circuit, a threshold compensation circuit, a first capacitor, and a second capacitor. A gate of the driving transistor is coupled to a first node, a first electrode is coupled to a second node, and a second electrode is coupled to a third node. The data write circuit is configured to transmit a signal of a data signal terminal to the second node in response to a signal of a first gate driving signal terminal. The threshold compensation circuit is configured to communicate the first node with the third node in response to a signal of a second gate driving signal terminal. The first capacitor is coupled between the first node and the first gate driving signal terminal. The second capacitor is coupled between the first node and the second gate driving signal terminal.

Abstract: A display substrate includes a plurality of circuit units. Each circuit unit includes a pixel driving circuit. The pixel driving circuit at least includes a first transistor, a second transistor, a third transistor, a fourth transistor, a ninth transistor, a first storage capacitor and a second storage capacitor. A second electrode of the first transistor is connected to a first electrode of the second transistor, the gate electrode of the third transistor, and a first end of the first storage capacitor, respectively. A second electrode of the fourth transistor is connected to a second electrode of the ninth transistor, a second end of the first storage capacitor, and a second end of the second storage capacitor, respectively.

Abstract: A display substrate includes a base substrate, a driving circuit layer and a plurality of light-emitting devices. The base substrate includes light-emitting regions and a non-light-emitting region except the light-emitting regions. The driving circuit layer is located on a side of the base substrate, and the driving circuit layer includes a plurality of data signal lines located in the non-light-emitting region. The plurality of light-emitting devices are located on a side of the driving circuit layer away from the base substrate. The plurality of light-emitting devices include first light-emitting devices; an anode of a first light-emitting device includes sub-anodes and a connection portion, a gap exists between adjacent sub-anodes, and in the first light-emitting device, the sub-anodes are connected to the connection portion. An orthographic projection of a data signal line on the base substrate is non-overlapping with orthographic projections of the sub-anodes on the base substrate.