Patents by Inventor Lanxiang Wang
Lanxiang Wang has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 11823889Abstract: A sensor may be provided, including a substrate having a first semiconductor layer, a second semiconductor layer, and a buried insulator layer arranged between the first semiconductor layer and the second semiconductor layer. The sensor may further include a photodiode arranged in the first semiconductor layer; and a quenching resistive element electrically connected in series with the photodiode. The quenching resistive element is arranged in the second semiconductor layer, and the quenching resistive element is arranged over the photodiode but separated from the photodiode by the buried insulator layer.Type: GrantFiled: May 11, 2022Date of Patent: November 21, 2023Assignee: GLOBALFOUNDRIES Singapore Pte. Ltd.Inventors: Lanxiang Wang, Shyue Seng Tan, Eng Huat Toh
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Patent number: 11774402Abstract: According to various embodiments, there is provided a sensor device that includes: a substrate and two semiconductor structures. Each semiconductor structure includes a source region and a drain region at least partially disposed within the substrate, a channel region between the source region and the drain region, and a gate region. A first semiconductor structure of the two semiconductor structures further includes a sensing element electrically connected to the first gate structure. The sensing element is configured to receive a solution. The drain regions of the two semiconductor structures are electrically coupled. The source regions of the two semiconductor structures are also electrically coupled. A mobility of charge carriers of the channel region of a second semiconductor structure of the two semiconductor structures is lower than a mobility of charge carriers of the channel region of the first semiconductor structure.Type: GrantFiled: March 21, 2022Date of Patent: October 3, 2023Assignee: GLOBALFOUNDRIES Singapore Pte. Ltd.Inventors: Lanxiang Wang, Bin Liu, Eng Huat Toh, Shyue Seng Tan, Kiok Boone Elgin Quek
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Patent number: 11744166Abstract: Structures for a resistive memory element and methods of forming a structure for a resistive memory element. The resistive memory element has a first electrode, a second electrode, a third electrode, and a switching layer. The first electrode is coupled to the switching layer, the second electrode is coupled to a side surface of the switching layer, and the third electrode is coupled to the switching layer.Type: GrantFiled: August 31, 2020Date of Patent: August 29, 2023Assignee: GlobalFoundries Singapore Pte. Ltd.Inventors: Lanxiang Wang, Shyue Seng Tan, Eng Huat Toh
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Patent number: 11641739Abstract: A memory device is provided. The memory device includes an active region in a substrate, an electrically-isolated electrode, and a dielectric layer. The electrically-isolated electrode is disposed over the active region. The dielectric layer is disposed between the electrically-isolated electrode and the active region and has a first dielectric portion having a first thickness and a second dielectric portion having a second thickness.Type: GrantFiled: June 1, 2020Date of Patent: May 2, 2023Assignee: GLOBALFOUNDRIES SINGAPORE PTE. LTD.Inventors: Yongshun Sun, Eng Huat Toh, Shyue Seng Tan, Xinshu Cai, Lanxiang Wang
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Patent number: 11600664Abstract: A memory device may be provided, including a substrate; one or more bottom electrodes arranged over the substrate; one or more switching layers arranged over the one or more bottom electrodes; and a plurality of top electrodes arranged over the one or more switching layers. Each of the one or more bottom electrodes may include at least one corner tip facing the switching layer, and an angle of each of the at least one corner tip may be less than ninety degrees.Type: GrantFiled: January 16, 2020Date of Patent: March 7, 2023Assignee: GLOBALFOUNDRIES Singapore Pte. Ltd.Inventors: Lanxiang Wang, Shyue Seng Tan, Eng Huat Toh, Benfu Lin
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Publication number: 20220416009Abstract: A semiconductor device includes a first terminal, a second terminal positioned away from the first terminal, a first resistive segment coupled between the first terminal and the second terminal, a third terminal positioned away from the first terminal and the second terminal, a second resistive segment coupled between the second terminal and third terminal, a first floating plate disposed physically proximate the first resistive segment and including a first end coupled to one of the first terminal and the second terminal, and a second floating plate disposed physically proximate the second resistive segment and including a first end coupled to one of the second terminal and the third terminal.Type: ApplicationFiled: June 2, 2022Publication date: December 29, 2022Applicant: MediaTek Singapore Pte. Ltd.Inventors: Lanxiang Wang, Zhigang Duan
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Patent number: 11515314Abstract: A nonvolatile memory device is provided. The device comprises a memory transistor. A first capacitor is coupled to the memory transistor. A second capacitor is coupled to the memory transistor. The second capacitor comprises a first electrode and a second electrode. The first capacitor and the second capacitor are connected to separate input terminals.Type: GrantFiled: June 4, 2020Date of Patent: November 29, 2022Assignee: GLOBALFOUNDRIES SINGAPORE PTE. LTD.Inventors: Xinshu Cai, Lanxiang Wang, Yongshun Sun, Eng Huat Toh, Shyue Seng Tan
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Patent number: 11495608Abstract: A nonvolatile memory device is provided. The device comprises a floating gate having a first finger and a second finger and an active region below the floating gate fingers. A first doped region is in the active region laterally displaced from the first floating gate finger on a first side. A second doped region is in the active region laterally displaced from the first floating gate finger on a second side. A third doped region is in the active region laterally displaced from the second floating gate finger and the second doped region.Type: GrantFiled: August 3, 2020Date of Patent: November 8, 2022Assignee: GLOBALFOUNDRIES Singapore Pte. Ltd.Inventors: Lanxiang Wang, Eng Huat Toh, Shyue Seng Tan, Xinshu Cai, Yongshun Sun
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Patent number: 11450677Abstract: A nonvolatile memory device may be provided. The nonvolatile memory device comprises an active region, an n-well region and an isolation region separating the active region and the n-well region. A floating gate may be provided. The floating gate may be arranged over a portion of the active region and over a first portion of the n-well region. A first doped region in the active region may be laterally displaced from the floating gate on a first side and a second doped region in the active region may be laterally displaced from the floating gate on a second side opposite to the first side. A contact may be arranged over the n-well region, whereby the contact may be laterally displaced from a first corner of the floating gate over the first portion of the n-well region. A silicide exclusion layer may be arranged at least partially over the floating gate.Type: GrantFiled: November 9, 2020Date of Patent: September 20, 2022Assignee: Globalfoundries Singapore Pte. Ltd.Inventors: Lanxiang Wang, Shyue Seng Tan, Xinshu Cai, Eng Huat Toh, Yongshun Sun
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Publication number: 20220271177Abstract: A sensor may be provided, including a substrate having a first semiconductor layer, a second semiconductor layer, and a buried insulator layer arranged between the first semiconductor layer and the second semiconductor layer. The sensor may further include a photodiode arranged in the first semiconductor layer; and a quenching resistive element electrically connected in series with the photodiode. The quenching resistive element is arranged in the second semiconductor layer, and the quenching resistive element is arranged over the photodiode but separated from the photodiode by the buried insulator layer.Type: ApplicationFiled: May 11, 2022Publication date: August 25, 2022Inventors: Lanxiang WANG, Shyue Seng TAN, Eng Huat TOH
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Publication number: 20220242468Abstract: The present invention relates to a full-day in each train operation diagram generation method based on a time division scheme and an activity-event relationship, the method including: S1: configuring operation scheme basic parameters; S2: constructing a quantitative relationship between a travel time and a driving interval for different routing ratios and calculating, within a given turn-back time range, an actual turn-back time of each turn-back station that can achieve a routing ratio requirement; S3: generating an arrival event time and a departure event time of a train in each time period at a station platform in accordance with routing division, direction division, and proportion division, correcting a start time and a stop time of each routing in accordance with time period division, and performing transition between the time periods; and S4: connecting a train section operation activity and a stop activity according to the full-time train arrival and departure event times obtained by executing step S3Type: ApplicationFiled: October 19, 2020Publication date: August 4, 2022Inventors: Fengbo LIU, Jiang QIAN, Honghui YAN, Jing XU, Tingliang ZHOU, Lanxiang WANG
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Patent number: 11380703Abstract: A memory structure may be provided, including a substrate, and a first well region, a second well region, and a third well region arranged within the substrate, where the first well region and the third well region may have a first conductivity type, and the second well region may have a second conductivity type different from the first conductivity type, and where the second well region may be arranged laterally between the first well region and the third well region. The memory structure may further include a first gate structure and a second gate structure arranged over the second well region. The first gate structure may extend over the third well region and the second gate structure may extend over the first well region.Type: GrantFiled: November 3, 2020Date of Patent: July 5, 2022Assignee: GLOBALFOUNDRIES Singapore Pte. Ltd.Inventors: Xinshu Cai, Yongshun Sun, Lanxiang Wang, Eng Huat Toh, Shyue Seng Tan
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Publication number: 20220205948Abstract: According to various embodiments, there is provided a sensor device that includes: a substrate and two semiconductor structures. Each semiconductor structure includes a source region and a drain region at least partially disposed within the substrate, a channel region between the source region and the drain region, and a gate region. A first semiconductor structure of the two semiconductor structures further includes a sensing element electrically connected to the first gate structure. The sensing element is configured to receive a solution. The drain regions of the two semiconductor structures are electrically coupled. The source regions of the two semiconductor structures are also electrically coupled. A mobility of charge carriers of the channel region of a second semiconductor structure of the two semiconductor structures is lower than a mobility of charge carriers of the channel region of the first semiconductor structure.Type: ApplicationFiled: March 21, 2022Publication date: June 30, 2022Inventors: Lanxiang WANG, Bin LIU, Eng Huat TOH, Shyue Seng TAN, Kiok Boone Elgin QUEK
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Patent number: 11374135Abstract: A sensor may be provided, including a substrate having a first semiconductor layer, a second semiconductor layer, and a buried insulator layer arranged between the first semiconductor layer and the second semiconductor layer. The sensor may further include a photodiode arranged in the first semiconductor layer; and a quenching resistive element electrically connected in series with the photodiode. The quenching resistive element is arranged in the second semiconductor layer, and the quenching resistive element is arranged over the photodiode but separated from the photodiode by the buried insulator layer.Type: GrantFiled: August 30, 2019Date of Patent: June 28, 2022Assignee: GLOBALFOUNDRIES Singapore Pte. Ltd.Inventors: Lanxiang Wang, Shyue Seng Tan, Eng Huat Toh
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Publication number: 20220149057Abstract: A nonvolatile memory device may be provided. The nonvolatile memory device comprises an active region, an n-well region and an isolation region separating the active region and the n-well region. A floating gate may be provided. The floating gate may be arranged over a portion of the active region and over a first portion of the n-well region. A first doped region in the active region may be laterally displaced from the floating gate on a first side and a second doped region in the active region may be laterally displaced from the floating gate on a second side opposite to the first side. A contact may be arranged over the n-well region, whereby the contact may be laterally displaced from a first corner of the floating gate over the first portion of the n-well region. A silicide exclusion layer may be arranged at least partially over the floating gate.Type: ApplicationFiled: November 9, 2020Publication date: May 12, 2022Inventors: LANXIANG WANG, SHYUE SENG TAN, XINSHU CAI, ENG HUAT TOH, YONGSHUN SUN
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Patent number: 11327045Abstract: A sensor device includes a substrate, first and second source regions, first and second drain regions, first and second channel regions, and first and second gate structures disposed over the first and second channel regions respectively. The source regions and drain regions are at least partially disposed within the substrate. The second gate structure includes first and second gate elements, and a resistance region configured to provide a resistance to a second current flow through the second channel region. In use, the first gate structure may receive a solution, and a change in pH in the solution changes a first current flow through the first channel region. In turn, the second current flow through the second channel region changes to compensate for the change in the first current flow to maintain a constant current flow through the sensor device.Type: GrantFiled: October 18, 2018Date of Patent: May 10, 2022Assignee: GLOBALFOUNDRIES Singapore Pte. Ltd.Inventors: Lanxiang Wang, Ping Zheng, Shyue Seng Tan, Eng Huat Toh
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Publication number: 20220139929Abstract: A memory structure may be provided, including a substrate, and a first well region, a second well region, and a third well region arranged within the substrate, where the first well region and the third well region may have a first conductivity type, and the second well region may have a second conductivity type different from the first conductivity type, and where the second well region may be arranged laterally between the first well region and the third well region. The memory structure may further include a first gate structure and a second gate structure arranged over the second well region. The first gate structure may extend over the third well region and the second gate structure may extend over the first well region.Type: ApplicationFiled: November 3, 2020Publication date: May 5, 2022Inventors: Xinshu CAI, Yongshun SUN, Lanxiang WANG, Eng Huat TOH, Shyue Seng TAN
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Patent number: 11313827Abstract: According to various embodiments, there is provided a sensor device that includes: a substrate and two semiconductor structures. Each semiconductor structure includes a source region and a drain region at least partially disposed within the substrate, a channel region between the source region and the drain region, and a gate region. A first semiconductor structure of the two semiconductor structures further includes a sensing element electrically connected to the first gate structure. The sensing element is configured to receive a solution. The drain regions of the two semiconductor structures are electrically coupled. The source regions of the two semiconductor structures are also electrically coupled. A mobility of charge carriers of the channel region of a second semiconductor structure of the two semiconductor structures is lower than a mobility of charge carriers of the channel region of the first semiconductor structure.Type: GrantFiled: June 28, 2019Date of Patent: April 26, 2022Assignee: GLOBALFOUNDRIES Singapore Pte. Ltd.Inventors: Lanxiang Wang, Bin Liu, Eng Huat Toh, Shyue Seng Tan, Kiok Boone Elgin Quek
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Patent number: 11316063Abstract: According to various embodiments, there is provided a diode device including a semiconductor substrate of a first conductivity type, a first semiconductor region formed within the semiconductor substrate, an epitaxial region of the first conductivity type, and a second semiconductor region of a second conductivity type different from the first conductivity type. The first semiconductor region includes a chalcogen. The epitaxial region is formed over the first semiconductor region. The second semiconductor region is formed over the epitaxial region.Type: GrantFiled: March 13, 2020Date of Patent: April 26, 2022Assignee: GLOBALFOUNDRIES Singapore Pte. Ltd.Inventors: Sandipta Roy, Khee Yong Lim, Lanxiang Wang, Kiok Boone Elgin Quek, Jing Hua Michelle Tng
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Publication number: 20220069213Abstract: Structures for a resistive memory element and methods of forming a structure for a resistive memory element. The resistive memory element has a first electrode, a second electrode, a third electrode, and a switching layer. The first electrode is coupled to the switching layer, the second electrode is coupled to a side surface of the switching layer, and the third electrode is coupled to the switching layer.Type: ApplicationFiled: August 31, 2020Publication date: March 3, 2022Inventors: Lanxiang Wang, Shyue Seng Tan, Eng Huat Toh