Abstract: A universal cell, for use in fabricating a custom analog circuit from a standard semiconductor wafer containing a plurality of such cells, includes a semiconductor pocket of a first conductivity type having a surface. At least two regions of second conductivity type opposite to the first conductivity type are formed laterally spaced from each other in the semiconductor pocket. At least one region of the first conductivity type is then formed in one of the at least two regions of second conductivity type. Electrical interconnects are then provided to interconnect one or more of the at least two regions, the pocket of semiconductor material and the at least one region of the first conductivity type to form a selected structure such as an NPN transistor, a PNP transistor, a resistor or a diode. A plurality of identical cells of this type are formed in a semiconductor die and can be selectively interconnected to form any one of a large number of analog circuits.