Abstract: An array antenna. In some embodiments, the array antenna includes a base plate having a surface including a plurality of grooves, a plurality of circulator carriers on the base plate, a plurality of cover strips on the circulator carriers, a plurality of circulators, and a plurality of threaded fasteners. The circulator carriers and the cover strips may be secured to the base plate by the threaded fasteners. Each of the circulators may be coplanar with the base plate. Materials in the array antenna may be selected to avoid galvanic corrosion.

Abstract: An RF antenna feed module uses an optical feed network and photo-detectors to generate RF feed signals to drive a dual polarization RF antenna to produce an RF beam with a variable polarization state. The optical feed network and suitably the photo-detectors are monolithically fabricated PIC. Multiple modules may be configured to drive a dual polarization RF phased array. A single feed module can produce RF feed signals over a frequency range of at least 300 GHz.

Abstract: An armored radome includes an electrically-conductive ground plane that provides load bearing and/or ballistic protection to a shielded sensor, and a pair of radiator structures on opposing surfaces of the ground plane. The radiator structures each include an antenna, and the ground plane includes one or more coaxial feedthroughs that couple the antennas for reradiation of signals. One or both of the radiator structures may include a frequency-selective surface (FSS) according to a desired operating frequency range or to shape a frequency response of the radome. The disclosed radome is both mechanically strong, and electromagnetically transparent, or nearly so, across a wide range of frequencies and transmit/receive angles.

Abstract: An armored radome includes an electrically-conductive ground plane that provides load bearing and/or ballistic protection to a shielded sensor, and a pair of radiator structures on opposing surfaces of the ground plane. The radiator structures each include an antenna, and the ground plane includes one or more coaxial feedthroughs that couple the antennas for reradiation of signals. One or both of the radiator structures may include a frequency-selective surface (FSS) according to a desired operating frequency range or to shape a frequency response of the radome. The disclosed radome is both mechanically strong, and electromagnetically transparent, or nearly so, across a wide range of frequencies and transmit/receive angles.

Abstract: An array antenna. In some embodiments, the array antenna includes a base plate having a surface including a plurality of grooves, a plurality of circulator carriers on the base plate, a plurality of cover strips on the circulator carriers, a plurality of circulators, and a plurality of threaded fasteners. The circulator carriers and the cover strips may be secured to the base plate by the threaded fasteners. Each of the circulators may be coplanar with the base plate. Materials in the array antenna may be selected to avoid galvanic corrosion.

Abstract: An RF antenna feed module uses an optical feed network and photo-detectors to generate RF feed signals to drive a dual polarization RF antenna to produce an RF beam with a variable polarization state. The optical feed network and suitably the photo-detectors are monolithically fabricated PIC. Multiple modules may be configured to drive a dual polarization RF phased array. A single feed module can produce RF feed signals over a frequency range of at least 300 GHz.

Abstract: A radio frequency (RF) system includes a transmitter and a receiver. The transmitter includes a transmitter (TX) antenna array and a TX signal absorber. The TX antenna array is configured to output a first RF signal. The receiver includes a receiver (RX) antenna array and a RX signal absorber. The RX antenna array is configured to receive a second RF signal. The TX signal absorber and the RX signal absorber are each configured to absorb energy induced by the RF signal thereby mitigating electrical co-site interference between the transmitter and the receiver.

Abstract: An apparatus for performing interference cancellation is disclosed, comprising: a first electro-optic (EO) modulator configured to modulate a received RF signal onto a first optical carrier signal to generate a first modulated signal; a plurality of base signal sources configured to generate a plurality of base signals; an optical combiner coupled to the plurality of base signal sources, the optical combiner being configured to combine the base signals into a second optical carrier signal; a second EO modulator configured to modulate a reference signal onto the second optical carrier signal to generate a second modulated signal; and a subtraction element that is coupled to the first EO modulator and the refractive element, the subtraction element being configured to subtract the tapped delay line signal from the first modulated signal to generate an output signal.

Abstract: An apparatus for performing interference cancellation is disclosed, comprising: a first electro-optic (EO) modulator configured to modulate a received RF signal onto a first optical carrier signal to generate a first modulated signal; a plurality of base signal sources configured to generate a plurality of base signals; an optical combiner coupled to the plurality of base signal sources, the optical combiner being configured to combine the base signals into a second optical carrier signal; a second EO modulator configured to modulate a reference signal onto the second optical carrier signal to generate a second modulated signal; and a subtraction element that is coupled to the first EO modulator and the refractive element, the subtraction element being configured to subtract the tapped delay line signal from the first modulated signal to generate an output signal.

Abstract: Described is a radio frequency (RF) array antenna element provided from a multi-layer printed circuit board (PCB) having disposed thereon a plurality of dual-polarized antenna elements with each of the dual-polarized antenna elements disposed to define a segmentation cut plane therebetween to enable size modification and modular construction of the RF array antenna.

Abstract: A wideband dual-polarized current loop antenna element is provided having a ground tower and an antenna circuit integrated, such as within a multi-layer circuit board configuration. The antenna circuit includes feed conductors and element conductors, each of which are capacitively coupled to a top ground plane of the ground tower. The feed conductors are coupled to receive signals from coaxial feed lines coupled to the respective antenna element and element conductors are coupled to receive signals from adjacent antenna elements, such as in an antenna array configuration. The antenna element can further include one or more frequency selective surface (FSS) layers disposed proximate to the top ground plane of the ground tower and the antenna circuit. The ground tower, antenna circuit and one or more FSS layers can be formed to provide a low-profile antenna element having wide broadband performance.

Abstract: A wideband dual-polarized current loop antenna element is provided having a ground tower and an antenna circuit integrated, such as within a multi-layer circuit board configuration. The antenna circuit includes feed conductors and element conductors, each of which are capacitively coupled to a top ground plane of the ground tower. The feed conductors are coupled to receive signals from coaxial feed lines coupled to the respective antenna element and element conductors are coupled to receive signals from adjacent antenna elements, such as in an antenna array configuration. The antenna element can further include one or more frequency selective surface (FSS) layers disposed proximate to the top ground plane of the ground tower and the antenna circuit. The ground tower, antenna circuit and one or more FSS layers can be formed to provide a low-profile antenna element having wide broadband performance.

Abstract: Methods and apparatus for a feed assembly for a reflector antenna including an aperture common to low, mid, and high frequency bands, a polyrod design to launch signals in the mid and high frequency bands, a horn to launch signals in the low frequency band, a co-located phase center for launching signals in the low, mid, and high frequency bands, and a low-band monopulse array located on a surface about the aperture to track a satellite.

Abstract: Methods and apparatus for a feed assembly for a reflector antenna including an aperture common to low, mid, and high frequency bands, a polyrod design to launch signals in the mid and high frequency bands, a horn to launch signals in the low frequency band, a co-located phase center for launching signals in the low, mid, and high frequency bands, and a low-band monopulse array located on a surface about the aperture to track a satellite.

Abstract: A chemical irritant dispensing apparatus for dispensing pepper spray, mace, tear gas or the like, includes a frame having a handle with a cavity and a barrel. The barrel has a bore that is preferably cylindrically shaped, having a central longitudinal axis that defines a line of fire. A chemical irritant fluid containing canister occupies the cavity during use, the canister having an upper end portion with a trigger receptive recess. A trigger pivots upon the frame, the trigger being positioned to dispense the contents of the canister when depressed by a user. The trigger has a stop portion that prevents rotation in a direction that would enable the canister to be removed from the frame. A safety prevents any movement of the canister relative to the frame when in a safety, non-firing position. The safety can be moved to a non-firing position by a user.

Abstract: An FET substrate voltage generator circuit is disclosed for converting a single power supply and ground potential to a negative potential having an absolute value whose magnitude is greater than the power supply potential and applying that potential to the substrate of an integrated circuit upon which it is formed. The circuit dissipates less power per unit of current supplied by the circuit and occupies less space than do prior art circuits. The circuit applies the principle of voltage doubling to a first capacitor to achieve the desired voltage magnitude across a second capacitor and then applies the principle of a.c. coupling to that second capacitor connected through an impedance to the first capacitor, to achieve the desired polarity inversion for the substrate voltage to be generated. This circuit provides the current generating capacity necessary to drive the substrate to a negative voltage and sink the required current so as to maintain the substrate at an adequate negative bias.

Abstract: Use of a residual charge bleed-off diode connected to the gate of an FET device in a Read Only Storage (ROS) is disclosed. The ROS is personalized by cutting selected gate leads in an array of FETs with a laser beam. Experience has shown that static electric charges on the lead due to handling prior to cutting become isolated at the gate after the gate lead is cut, producing an unpredictable conduction state for the FET instead of a solid off-state as desired. By providing a bleed-off diode which remains connected to the FET gate after the cut is made, the charges are allowed to leak away from those FETs whose gates have been cut while, at the same time, preventing the voltage of the FET gate from floating. The diode is oriented so as to offer a high impedance to current flowing from the gate node when the gate is biased for FET conduction. This minimizes the effect of the diode on circuit speed when the gate remains connected with the balance of the read only storage circuitry.

Abstract: A high speed true/complement driver circuit is disclosed wherein the time interval between the address and memory select pulses are minimized by utilizing a high speed enhancement/depletion mode inverter pair followed by a clocked signal isolation stage. A pair of enhancement mode/depletion mode inverters connected in cascade configuration serves to generate the true and complement output signals which are isolated from noise at the input line by a symmetric pair of clocked FETs.