Patents by Inventor Larry D. Webster

Larry D. Webster has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 6195755
    Abstract: A nonvolatile power management apparatus that controls the use of power within an integrated circuit. The embodiment varies the power applied to a functional circuit within the integrated circuit. At nominal power, the functional circuit operates normally per nominal operational specifications. Under reduced power, the integrated circuit retains all of its internal states, but has its I/O nets isolated from external circuitry. This prevents latch-up of the functional circuit operating from reduced power (low power input voltage) and prevents external circuitry connected to the integrated circuit from being overloaded.
    Type: Grant
    Filed: August 9, 1994
    Date of Patent: February 27, 2001
    Inventors: Larry D. Webster, Ehud Pardo
  • Patent number: 6166554
    Abstract: An electrical test fixture used to connect the probes of an electronic test instrument to the pins of any integrated circuit. Made from flexible material, the fixture folds above the integrated circuit under test bringing test point pins to useable position. The integrated circuit ususally is soldered to the test fixture and the test fixture soldered into the target circuit. Provides for noninvasive pickoff of integrated circuit signals. Allows production versions of a design to be identical to the prototype version.
    Type: Grant
    Filed: November 22, 1999
    Date of Patent: December 26, 2000
    Assignee: Electronics Products Company
    Inventors: Larry D. Webster, Ehud Pardo, Jerome F. Duluk, Jr.
  • Patent number: 6005403
    Abstract: An electrical test fixture used to connect the probes of an electronic test instrument to the pins of any integrated circuit. Made from flexible material, the fixture folds above the integrated circuit under test bringing test point pins to useable position. The integrated circuit ususally is soldered to the test fixture and the test fixture soldered into the target circuit. Provides for noninvasive pickoff of integrated circuit signals. Allows production versions of a design to be identical to the prototype version.
    Type: Grant
    Filed: December 1, 1997
    Date of Patent: December 21, 1999
    Assignee: Electronics Products Company
    Inventors: Larry D. Webster, Ehud Pardo, Jerome F. Duluk, Jr.
  • Patent number: 5692911
    Abstract: An electrical test fixture used to connect the probes of an electronic test instrument to the pins of any integrated circuit. Made from flexible material, the fixture folds above the integrated circuit under test bringing test point pins to useable position. The integrated circuit usually is soldered to the test fixture and the test fixture soldered into the target circuit. Provides for noninvasive pickoff of integrated circuit signals. Allows production versions of a design to be identical to the prototype version.
    Type: Grant
    Filed: March 27, 1996
    Date of Patent: December 2, 1997
    Assignee: Electronic Products, Inc.
    Inventors: Larry D. Webster, Ehud Pardo, Jerome F. Duluk, Jr.
  • Patent number: 5504909
    Abstract: A power management apparatus that controls the use of power within an integrated circuit. A first embodiment gates integrated circuit power on or off concurrently with switches inserted between the co-resident functional circuit I/O nets and the integrated circuit I/O pads. A second embodiment instantiates the power management apparatus on an integrated circuit by itself for connection to external integrated circuits. Buffering or sequencing is provided for both embodiments.
    Type: Grant
    Filed: January 21, 1994
    Date of Patent: April 2, 1996
    Assignee: Electronics Products Company
    Inventors: Larry D. Webster, Ehud Pardo
  • Patent number: 4391514
    Abstract: The object of the invention is to provide an improved laser altimeter for a flight simulator which will allow measurement of the height of the simulator probe above the terrain directly below the probe tip.A laser beam 22 is directed from the probe 13 at an angle .theta. to the horizontal to produce a beam spot 20 on the terrain. The angle .theta. that the laser beam 22 makes with the horizontal is varied so as to bring the beam spot into coincidence with a plumb line 18 coaxial with the longitudinal axis of the probe 13. A television altimeter camera 30 observes the beam spot and has a raster line aligned with the plumb line 18. Spot detector circuit 26 coupled to the output of the TV camera monitors the position of the beam spot relative to the plumb line 18. An error signal is produced by computer 28 driving, via a servo motor 23, the laser beam optics so as to cause the beam spot to come into coincidence with the plumb line 18.
    Type: Grant
    Filed: February 13, 1981
    Date of Patent: July 5, 1983
    Assignee: The United States of America as represented by the Administrator of the National Aeronautics and Space Administration
    Inventor: Larry D. Webster