Abstract: A technique for eliminating electrically conductive vias is disclosed. In one embodiment, the technique is realized as an improved multilayer circuit board for eliminating electrically conductive vias. The multilayer circuit board has a top layer and a buried layer separated by at least one dielectric layer, wherein the buried layer includes an electrically conductive power plane portion and an electrically conductive ground plane portion. The improvement comprises a cavity in the multilayer circuit board extending through the top layer and the at least one dielectric layer so as to expose at least a portion of the power plane portion and the ground plane portion of the buried layer within the cavity.

Abstract: A technique for eliminating electrically conductive vias is disclosed. In one embodiment, the technique is realized as an improved multilayer circuit board for eliminating electrically conductive vias. The multilayer circuit board has a top layer and a buried layer separated by at least one dielectric layer, wherein the buried layer includes an electrically conductive power plane portion and an electrically conductive ground plane portion. The improvement comprises a cavity in the multilayer circuit board extending through the top layer and the at least one dielectric layer so as to expose at least a portion of the power plane portion and the ground plane portion of the buried layer within the cavity.

Abstract: A technique for reducing the number of layers in a multilayer circuit board is disclosed. The multilayer circuit board has a plurality of electrically conductive signal layers for routing electrical signals to and from at least one electronic component mounted on a surface of the multilayer circuit board. In one embodiment, the technique is realized by forming a first plurality of electrically conductive vias in the multilayer circuit board extending from the surface of the multilayer circuit board to a first of the plurality of electrically conductive signal layers, wherein the first plurality of electrically conductive vias are arranged so as to form a channel in a second of the plurality of electrically conductive signal layers beneath the first plurality of electrically conductive vias.

Abstract: A technique for reducing the number of layers in a multilayer circuit board is disclosed. In one embodiment, the technique is realized by forming a first plurality of electrically conductive vias in the multilayer circuit board extending from the surface of the multilayer circuit board to a first of the plurality of electrically conductive signal layers, wherein the first plurality of electrically conductive vias are arranged so as to form a channel in a second of the plurality of electrically conductive signal layers beneath the first plurality of electrically conductive vias. A first plurality of electrical signals are routed on the first of the plurality of electrically conductive signal layers. A second plurality of electrical signals are routed on the second of the plurality of electrically conductive signal layers in the channel formed in the second of the plurality of electrically conductive signal layers.