Abstract: There is disclosed a decimator structure which incorporates the cascade of an FIR filter with a low pass recursive filter. The input to the decimator is obtained from a high rate analog to digital converter. The output from the decimator is a low rate digital signal having an increased word length. The decimator serves to reduce the word rate and increase the word length of the output digital signal of the analog to digital converter. In this manner, the low rate digital signal at the output of the decimator can be easily accommodated by the telephone system. The decimator described does not require conventional hardware multipliers and hence, affords efficient and economical circuit components which can be implemented by conventional integrated circuit techniques. A register further reduces the pulse rate for transmission.