Abstract: An apparatus and method is provided to accurately align a cap wafer relative to a microelectromechanical systems (MEMS) wafer during a bonding process. Other materials may be accurately aligned as well. A trench is established in the MEMS wafer, and a printed substance, secured to the cap wafer, flows into the trench when a pressure is applied to the cap wafer at bond temperature. Natural forces aid in shifting the materials into a lowest energy state and self-aligns the materials into a desired position. The trench also serves as a collection trench for the flowing substance by helping to shape the substance. The trench dimensions may be used to aid in creating a hermetic seal. The alignment tolerances required conventionally during the device design stage are decreased, since the present invention provides a repeatable and accurate alignment bonding process. Chip multiple is increased and therefore chip costs are decreased.

Abstract: A method of glass frit bonding wafers to form a package, in which the width of the glass bond line between the wafers is minimized to reduce package size. The method entails the use of a glass frit material containing a particulate filler material that establishes the stand-off distance between wafers, instead of relying on discrete structural features on one of the wafers dedicated to this function. In addition, the amount of glass frit material used to form the glass bond line between wafers is reduced to such levels as to reduce the width of the glass bond line, allowing the overall size of the package to be minimized. To accommodate the variability associated with screening processes when low volume lines of paste are printed, the invention further entails the use of storage regions defined by walls adjacent the glass bond line to accommodate excess glass frit material without significantly increasing the width of the bond line.

Abstract: A method of bonding two electrically conductive substrates together includes the steps of forming a dielectric layer between the substrates, with the layer being formed from a sol-gel solution. Through the application of a constant voltage an ionic depletion region is created in the dielectric layer. After the step of creating the ionic depletion region, the dielectric layer and substrates are heated such that an oxygen depletion region is created in one of the substrates. The sol-gel solution includes sodium aluminoborosilicate having about 75-90 mol % SiO.sub.2, about 5-20 mol % B.sub.2 O.sub.3, about 1-10 mol % Na.sub.2 O and about 0-5 mol % Al.sub.2 O.sub.3.

Abstract: An alignment assembly for masking and a process for depositing a metallic coating on selected areas on the back side of a semiconductor wafer. The assembly and process involves a distinctive alignment chuck having a pattern of grooves therein and a mask aligned with the chuck. In the method, a photomask for the back side of the wafer is aligned with the grooves in the chuck, a wafer nested face down in the chuck, and the mask moved into contact with the back side of the wafer. The front side of the wafer has a pattern of ridges that nest in the chuck grooves to align the wafer in the chuck. A photoresist layer on the back side of the wafer is subjected to an ultraviolet light through the photomask. Unexposed areas of photoresist are removed to expose selected areas on the back side of the wafer on which a metallic coating can be deposited.