Abstract: An electrical cable including four copper layers, where at least two of the four copper layers are separated by a polymeric base layer, and where at least two of the four copper layers are separated by an adhesive. The electrical cable further includes a polymeric cover layer adhered to an outermost copper layer.

Abstract: An electrical cable comprising four copper layers, where at least two of the four copper layers are separated by a polymeric base layer, and where at least two of the four copper layers are separated by an adhesive.

Abstract: A method according to one embodiment includes receiving an increment signal at a first integrator when a second integrator overflows; receiving a decrement signal at the first integrator when the second integrator underflows; and incrementing or decrementing a gain applied to an analog signal based on receipt of the increment or decrement signal. A system according to one embodiment includes a first integrator configured to cause incrementing of a gain applied to an analog signal based on receipt of an increment signal when a second integrator overflows, the first integrator being configured to cause decrementing of the gain applied to the analog signal based on receipt of a decrement signal when the second integrator underflows; and the second integrator.

Abstract: In one general embodiment, a system includes a first device on a first substrate; a second device on a second substrate; and a device select system coupled to the first and second devices. The device select system includes: a first portion having an array of first electrical contacts; a second portion having an array of second electrical contacts, there being more second electrical contacts than first electrical contacts, the second portion being coupled to the first and second devices, each of the first electrical contacts being associated with at least two of the second electrical contacts; and a select mechanism for selectively placing each of the first electrical contacts in electrical communication with one of the second electrical contacts associated therewith.

Abstract: A system according to one embodiment includes an analog input for receiving an analog signal; a variable gain amplifier coupled to the analog input; a first gain control circuit coupled to the variable gain amplifier for controlling the gain of the analog signal; an analog to digital converter for converting the analog signal to a digital signal; a first gain error generation circuit for generating a first gain error signal based on an output of the analog to digital converter, the first gain error signal or derivative thereof being received by the first gain control circuit; and a second gain error generation circuit for generating a second gain error signal based on the digital signal, the second gain error signal or derivative thereof being received by the first gain control circuit, wherein the first gain control circuit uses at least one of the gain error signals to control the gain of the analog signal.

Abstract: A sequential information storage medium, comprising a plurality of servo patterns encoded lengthwise thereon, wherein each servo pattern encodes at least one LPOS bit and comprises a width less than 187 microns.

Abstract: A tape drive system according to one general embodiment includes a magnetic head; a drive mechanism for passing a magnetic recording tape over the head; a cable coupled to the magnetic head, the cable comprising a first layer of liquid crystal polymer, and at least 16 electrically conductive leads operatively coupled to the first layer of liquid crystal polymer; and a controller coupled to the cable, and communicating with the head using the cable. A cable according to another general embodiment includes a first layer of liquid crystal polymer; and at least 16 electrically conductive leads operatively coupled to the first layer of liquid crystal polymer.

Abstract: A method according to one embodiment includes receiving an increment signal at a first integrator when a second integrator overflows; receiving a decrement signal at the first integrator when the second integrator underflows; and incrementing or decrementing a gain applied to an analog signal based on receipt of the increment or decrement signal. A system according to one embodiment includes a first integrator configured to cause incrementing of a gain applied to an analog signal based on receipt of an increment signal when a second integrator overflows, the first integrator being configured to cause decrementing of the gain applied to the analog signal based on receipt of a decrement signal when the second integrator underflows; and the second integrator.

Abstract: A sequential information storage medium, comprising a plurality of servo patterns encoded lengthwise thereon, wherein each servo pattern encodes at least one LPOS bit and comprises a width less than 187 microns.

Abstract: A system according to one embodiment includes an analog input for receiving an analog signal; a variable gain amplifier coupled to the analog input; a first integrator coupled to the variable gain amplifier for controlling the gain of the analog signal; a second integrator generating control signals for controlling functions of the first integrator; a serializer for serializing the control signals; and a deserializer coupled to the serializer for deserializing the control signals and passing the deserialized control signals to the first integrator.

Abstract: An apparatus, system, and method are disclosed for measuring magnetoresistive head assembly resistance. A measurement module measures a reference voltage across a reference resistance while applying a reference current to the reference resistance. In addition, the measurement module measures a test voltage across a first biasing resistor, a MR head assembly, and a second biasing resistor connected in series while applying the reference current to the first biasing resistor, the MR head assembly, and the second biasing resistor. A computation module calculates the MR head assembly resistance from the reference voltage, the test voltage, the reference resistance, and the resistances of the first and second biasing resistors.

Abstract: An apparatus, system, and method are disclosed for detecting the formation of a short between a magnetoresistive (“MR”) head and a head substrate. The apparatus is presented with a logic unit containing a plurality of modules configured to functionally execute the necessary steps of generating a baseline electric potential level between a head substrate and ground, monitoring the level of the electric potential between the head substrate and ground, and detecting the formation of a short circuit between the MR head and the head substrate by detecting a change in the electric potential level monitored by the monitoring module from the baseline level to a predetermined threshold level. Beneficially, such an apparatus, system, and method would reduce read errors on the magnetic tape storage system, the time and resources required to recover from such errors, and allow for preventative measures to obviate contamination short related failures of tape drive systems.

Abstract: A system according to one embodiment includes an analog input for receiving an analog signal; a variable gain amplifier coupled to the analog input; a first gain control circuit coupled to the variable gain amplifier for controlling the gain of the analog signal; an analog to digital converter for converting the analog signal to a digital signal; a first gain error generation circuit for generating a first gain error signal based on an output of the analog to digital converter, the first gain error signal or derivative thereof being received by the first gain control circuit; and a second gain error generation circuit for generating a second gain error signal based on the digital signal, the second gain error signal or derivative thereof being received by the first gain control circuit, wherein the first gain control circuit uses at least one of the gain error signals to control the gain of the analog signal.

Abstract: A system according to one embodiment includes an analog input for receiving an analog signal; a variable gain amplifier coupled to the analog input; a first gain control circuit coupled to the variable gain amplifier for controlling the gain of the analog signal; an analog to digital converter for converting the analog signal to a digital signal; a first gain error generation circuit for generating a first gain error signal based on an output of the analog to digital converter, the first gain error signal or derivative thereof being received by the first gain control circuit; and a second gain error generation circuit for generating a second gain error signal based on the digital signal, the second gain error signal or derivative thereof being received by the first gain control circuit, wherein the first gain control circuit uses at least one of the gain error signals to control the gain of the analog signals.

Abstract: A method for writing data to a tape at multiple rates for simultaneously creating data tracks having differing linear data densities, according to one embodiment, includes passing a tape over a head, the head having an array of writers thereon; receiving incoming data; mapping the data to a two dimensional array corresponding to the array of writers; clocking some of the mapped data to a first writer in the array of writers at a first rate; and clocking some of the mapped data to a second writer in the array of writers at a second rate different than the first rate.

Abstract: A method according to one embodiment includes generating a first gain error, comprising: receiving an output of an equalizer; and comparing a magnitude of the output to a saturation threshold level; if the output is higher than the saturation threshold level, generating a first gain error. The method further including generating at least one of a second and a third gain error, wherein generating the second gain error comprises: using either a slicer or a trellis for generating the second gain error, wherein the slicer generates a gain error based on an output of an interpolator, wherein the trellis generates a gain error based on an output of a maximum likelihood detector; wherein generating the third gain error comprises: receiving an output of an equalizer; generating a threshold qualified peak from the equalizer output and a tracking threshold level; comparing the threshold qualified peak to a second threshold; and generating a third gain error based on the comparison.

Abstract: A method according to one embodiment includes generating a first gain error, comprising: receiving an output of an equalizer; and comparing a magnitude of the output to a saturation threshold level; if the output is higher than the saturation threshold level, generating a first gain error. The method further including generating at least one of a second and a third gain error, wherein generating the second gain error comprises: using either a slicer or a trellis for generating the second gain error, wherein the slicer generates a gain error based on an output of an interpolator, wherein the trellis generates a gain error based on an output of a maximum likelihood detector; wherein generating the third gain error comprises: receiving an output of an equalizer; generating a threshold qualified peak from the equalizer output and a tracking threshold level; comparing the threshold qualified peak to a second threshold; and generating a third gain error based on the comparison.

Abstract: A sequential information storage medium, comprising a plurality of servo patterns encoded lengthwise thereon, wherein each servo pattern encodes at least one LPOS bit and comprises a width less than 187 microns.

Abstract: A system according to one embodiment includes an analog input for receiving an analog signal; a variable gain amplifier coupled to the analog input; a first integrator coupled to the variable gain amplifier for controlling the gain of the analog signal; a second integrator generating control signals for controlling functions of the first integrator; a serializer for serializing the control signals; and a deserializer coupled to the serializer for deserializing the control signals and passing the deserialized control signals to the first integrator.

Abstract: A system according to one embodiment includes an analog input for receiving an analog signal; a variable gain amplifier coupled to the analog input; a first gain control circuit coupled to the variable gain amplifier for controlling the gain of the analog signal; an analog to digital converter for converting the analog signal to a digital signal; a first gain error generation circuit for generating a first gain error signal based on an output of the analog to digital converter, the first gain error signal or derivative thereof being received by the first gain control circuit; and a second gain error generation circuit for generating a second gain error signal based on the digital signal, the second gain error signal or derivative thereof being received by the first gain control circuit, wherein the first gain control circuit uses at least one of the gain error signals to control the gain of the analog signals.