Abstract: A direct memory access (DMA) controller having a first mode and a second mode controls communication between a module bus, communicating with a processor and a memory, and an input/output (I/O) bus communicating with an external device. A data controller subsystem stores I/O bus input data to provide module bus output data, and stores module bus input data to provide I/O bus output data. A device address controller subsystem stores a device address from the module bus to provide an I/O device output address to the I/O bus for addressing the external device. A memory addressing subsystem receives module bus input data to form an initial memory address provided to the module bus representing a storage location in the memory. An incrementer increments the initial memory address.