Patents by Inventor Larry Rasnake

Larry Rasnake has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20070164419
    Abstract: Provided are methods of forming sealed via structures. One method involves: (a) providing a semiconductor substrate having a first surface and a second surface opposite the first surface; (b) forming a layer on the first surface of the substrate; (c) etching a via hole through the substrate from the second surface to the layer, the via hole having a first perimeter at the first surface; (d) forming an aperture in the layer, wherein the aperture has a second perimeter within the first perimeter; and (e) providing a conductive structure for sealing the via structure. Also provided are sealed via structures, methods of detecting leakage in a sealed device package, sealed device packages, device packages having cooling structures, and methods of bonding a first component to a second component.
    Type: Application
    Filed: October 31, 2006
    Publication date: July 19, 2007
    Applicant: Rohm and Haas Electronic Materials LLC
    Inventors: David Sherrer, Larry Rasnake, John Fisher
  • Publication number: 20070072321
    Abstract: Provided are methods of forming sealed via structures. One method involves: (a) providing a semiconductor substrate having a first surface and a second surface opposite the first surface; (b) forming a layer on the first surface of the substrate; (c) etching a via hole through the substrate from the second surface to the layer, the via hole having a first perimeter at the first surface; (d) forming an aperture in the layer, wherein the aperture has a second perimeter within the first perimeter; and (e) providing a conductive structure for sealing the via structure. Also provided are sealed via structures, methods of detecting leakage in a sealed device package, sealed device packages, device packages having cooling structures, and methods of bonding a first component to a second component.
    Type: Application
    Filed: October 31, 2006
    Publication date: March 29, 2007
    Applicant: Rohm and Haas Electronic Materials LLC
    Inventors: David Sherrer, Larry Rasnake, John Fisher
  • Publication number: 20070040268
    Abstract: Provided are methods of forming sealed via structures. One method involves: (a) providing a semiconductor substrate having a first surface and a second surface opposite the first surface; (b) forming a layer on the first surface of the substrate; (c) etching a via hole through the substrate from the second surface to the layer, the via hole having a first perimeter at the first surface; (d) forming an aperture in the layer, wherein the aperture has a second perimeter within the first perimeter; and (e) providing a conductive structure for sealing the via structure. Also provided are sealed via structures, methods of detecting leakage in a sealed device package, sealed device packages, device packages having cooling structures, and methods of bonding a first component to a second component.
    Type: Application
    Filed: October 31, 2006
    Publication date: February 22, 2007
    Applicant: Rohm and Haas Electronic Materials LLC
    Inventors: David Sherrer, Larry Rasnake, John Fisher
  • Publication number: 20050285216
    Abstract: The present invention provides an optical microbench having intersecting structures etched into a substrate. In particular, microbenches in accordance with the present invention include structures having a planar surfaces formed along selected crystallographic planes of a single crystal substrate. Two of the structures provided are an etch-stop pit and an anisotropically etched feature disposed adjacent the etch-stop pit. At the point of intersection between the etch-stop pit and the anisotropically etched feature the orientation of the crystallographic planes is maintained. The present invention also provides a method for micromachining a substrate to form an optical microbench. The method comprises the steps of forming an etch-stop pit and forming an anisotropically etched feature adjacent the etch-stop pit. The method may also comprise coating the surfaces of the etch-stop pit with an etch-stop layer.
    Type: Application
    Filed: June 14, 2005
    Publication date: December 29, 2005
    Applicant: Shipley Company, L.L.C.
    Inventors: Dan Steinberg, Larry Rasnake
  • Publication number: 20050111797
    Abstract: Provided are optoelectronic device packages. The packages include a base substrate having an optoelectronic device mounting region on a surface of the base substrate and a lid mounting region. An optoelectronic device is mounted on the optoelectronic device mounting region. A lid is mounted on the lid mounting region to form an enclosed volume between the base substrate and the lid. The optoelectronic device is in the enclosed volume. The lid has an optically transmissive region suitable for transmitting light of a given wavelength along an optical path to or from the optoelectronic device, wherein at least a portion of the lid mounting region is disposed along the optical path below the surface of the base substrate to a depth below the optical path. Also provided are wafer or grid level optoelectronic device packages, wafer- or grid-level optoelectronic device package lid and their methods of formation, and connectorized optoelectronic devices.
    Type: Application
    Filed: September 15, 2004
    Publication date: May 26, 2005
    Applicant: Rohm and Haas Electronic Materials, L.L.C.
    Inventors: David Sherrer, Larry Rasnake, John Fisher
  • Publication number: 20050110157
    Abstract: Provided are methods of forming sealed via structures. One method involves: (a) providing a semiconductor substrate having a first surface and a second surface opposite the first surface; (b) forming a layer on the first surface of the substrate; (c) etching a via hole through the substrate from the second surface to the layer, the via hole having a first perimeter at the first surface; (d) forming an aperture in the layer, wherein the aperture has a second perimeter within the first perimeter; and (e) providing a conductive structure for sealing the via structure. Also provided are sealed via structures, methods of detecting leakage in a sealed device package, sealed device packages, device packages having cooling structures, and methods of bonding a first component to a second component.
    Type: Application
    Filed: September 15, 2004
    Publication date: May 26, 2005
    Applicant: Rohm and Haas Electronic Materials, L.L.C.
    Inventors: David Sherrer, Larry Rasnake, John Fisher