Patents by Inventor Larry W. Shive
Larry W. Shive has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Publication number: 20140096793Abstract: A method is provided for cleaning a surface of a semiconductor wafer comprising: (a) contacting the front surface of the wafer with a slurry comprising an abrasive agent and a polymeric rheological modifier; (b) contacting the front surface of the semiconductor wafer with an oxidant; and (c) irradiating the front surface of the semiconductor wafer with ultraviolet light.Type: ApplicationFiled: October 3, 2013Publication date: April 10, 2014Inventors: Sasha J. Kweskin, Larry W. Shive
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Patent number: 8058173Abstract: Methods for reducing the surface roughness of semiconductor wafers through a combination of rough polishing and thermally annealing the wafer.Type: GrantFiled: December 19, 2007Date of Patent: November 15, 2011Assignee: MEMC Electronic Materials, Inc.Inventors: Larry W. Shive, Brian L. Gilmore
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Publication number: 20110146717Abstract: A system and method are disclosed for predicting the amount of contaminants deposited on a substrate, such as a semiconductor wafer, after contact the wafer with water in a container. The contaminants may includes materials that negatively affect the properties of the wafer even when the amount of contaminants deposited on the surface of the wafer is below the threshold level of detection of known systems. The method includes contacting the wafer with water for a first period of time, the wafer having wafer surfaces, drying the wafer, analyzing the wafer to determine contaminants on the wafer surfaces, and predicting the amount of contaminants deposited on the wafer when contacting the wafer with water for a second period of time shorter than the first period of time.Type: ApplicationFiled: December 14, 2010Publication date: June 23, 2011Applicant: MEMC ELECTRONIC MATERIALS, INC.Inventor: Larry W. Shive
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Publication number: 20100304022Abstract: A method is disclosed for sandblasting a wafer support platform to create a surface having a uniform roughness. Contaminants become embedded in the surface during the sandblasting procedure. A layer is applied over the surface to isolate the contaminants from a supported wafer while maintaining the uniform roughness.Type: ApplicationFiled: July 29, 2010Publication date: December 2, 2010Applicant: MEMC ELECTRONIC MATERIALS, INC.Inventors: Larry W. Shive, Brian L. Gilmore
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Publication number: 20080156260Abstract: A wafer support platform is sandblasted with silicon-containing particles to create a surface with uniform roughness. Contaminants become embedded in the surface during the sandblasting procedure. A layer is applied over the surface to isolate the contaminants from a support wafer while maintaining the uniform roughness.Type: ApplicationFiled: December 27, 2006Publication date: July 3, 2008Applicant: MEMC ELECTRONIC MATERIALS, INC.Inventors: Larry W. Shive, Brian L. Gilmore
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Publication number: 20080160788Abstract: Methods for reducing the surface roughness of semiconductor wafers through a combination of rough polishing and thermally annealing the wafer.Type: ApplicationFiled: December 19, 2007Publication date: July 3, 2008Applicant: MEMC ELECTRONIC MATERIALS, INC.Inventors: Larry W. Shive, Brian L. Gilmore
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Publication number: 20080041798Abstract: A platform for supporting a semiconductor wafer includes a body with channel having spaced apart first and second edge margins in contiguous relationship with a top surface of the body. At least one of the edge margins is generally convex along at least a portion of the channel.Type: ApplicationFiled: June 22, 2007Publication date: February 21, 2008Applicant: MEMC ELECTRONIC MATERIALS, INC.Inventors: Brian L. Gilmore, Larry W. Shive
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Patent number: 7084048Abstract: A process for removing a contaminant selected from among copper, nickel, and a combination thereof from a silicon wafer having a surface and an interior. The process comprises cooling the silicon wafer in a controlled atmosphere from a temperature at or above an oxidation initiation temperature and initiating a flow of an oxygen-containing atmosphere at said oxidation initiation temperature to create an oxidizing ambient around the silicon wafer surface to form an oxide layer on the silicon wafer surface and a strain layer at an interface between the oxide layer and the silicon wafer interior. The cooling of the wafer is also controlled to permit diffusion of atoms of the contaminant from the silicon wafer interior to the strain layer. Then the silicon wafer is then cleaned to remove the oxide layer and the strain layer, thereby removing said contaminant having diffused to the strain layer.Type: GrantFiled: May 7, 2004Date of Patent: August 1, 2006Assignee: MEMC Electronic Materials, Inc.Inventors: Larry W. Shive, Brian L. Gilmore
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Patent number: 7033168Abstract: A wafer boat for use in heat treatment of semiconductor wafers in a vertical furnace comprises support rods extending generally vertically when the wafer boat is placed in the vertical furnace. Fingers are supported by and extend along vertical extent of the support rods. Wafer holder platforms are adapted to be supported by groups of fingers lying in generally different common horizontal planes. The fingers are adapted to underlie the wafer holder platforms and support the platforms at the support locations. The fingers and wafer holder platforms each have a respective first overall maximum thickness. The support location of at least one of the fingers and the wafer holder platforms have a second maximum thickness less than the first overall maximum thickness.Type: GrantFiled: January 24, 2005Date of Patent: April 25, 2006Assignee: MEMC Electronic Materials, Inc.Inventors: Puneet Gupta, Larry W. Shive, Brian L. Gilmore
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Publication number: 20030008421Abstract: A process is disclosed for making a silicon wafer with low and uniform surface stress by growing at least approximately 8 angstroms of silicon oxide thereon to produce a wafer for use as a control wafer in ion implantation. The process involves the steps of (a) subjecting a feed wafer substantially free of oxide or having less than approximately 4 angstroms of silicon oxide thereon to hydrogen termination of the silicon surface; or (b) subjecting such a feed wafer to said hydrogen termination followed by subjecting the resulting wafer to treatment with an oxidant having a standard reduction potential less than approximately 1.77 volts; the wafer resulting from either step (a) or (b) having a TWO reading less than approximately 30 across the entire wafer.Type: ApplicationFiled: November 21, 2001Publication date: January 9, 2003Applicant: MEMC Electronic Materials, Inc.Inventor: Larry W. Shive
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Patent number: 6485992Abstract: A process is disclosed for making a silicon wafer with low and uniform surface stress by growing at least approximately 8 angstroms of silicon oxide thereon to produce a wafer for use as a control wafer in ion implantation. The process involves the steps of (a) subjecting a feed wafer substantially free of oxide or having less than approximately 4 angstroms of silicon oxide thereon to hydrogen termination of the silicon surface; or (b) subjecting such a feed wafer to said hydrogen termination followed by subjecting the resulting wafer to treatment with an oxidant having a standard reduction potential less than approximately 1.77 volts; the wafer resulting from either step (a) or (b) having a TWO reading less than approximately 30 across the entire wafer.Type: GrantFiled: November 21, 2001Date of Patent: November 26, 2002Assignee: MEMC Electronic Materials, Inc.Inventor: Larry W. Shive
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Patent number: 6482269Abstract: A process for removing a metallic contaminant from a nonpatterned silicon wafer. In the process, the wafer is annealed by immersing it for at least about 0.1 hours in an acidic solution which is heated to a temperature of at least about 125° C. in order to diffuse the metal to the surface of the wafer. As the diffused metal reaches the wafer surface, it is oxidized and complexed by the acidic solution and removed from the wafer surface.Type: GrantFiled: May 21, 1998Date of Patent: November 19, 2002Assignee: MEMC Electronic Materials, Inc.Inventors: Larry W. Shive, Carissima M. Vitus
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Publication number: 20020127766Abstract: A process for manufacturing a semiconductor wafer comprises first etching the wafer to reduce damage on the front and back surfaces. An epitaxial layer is grown on the etched front surface of the semiconductor wafer to improve the surface roughness of the front surface. Finally, the front surface of the wafer is final polished to further improve the surface roughness of the front surface.Type: ApplicationFiled: December 21, 2001Publication date: September 12, 2002Applicant: MEMC Electronic Materials, Inc.Inventors: Michael J. Ries, Gregory M. Wilson, Robert W. Standley, Larry W. Shive, Jon A. Rossi
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Patent number: 6230720Abstract: A process for cleaning a final polished semiconductor wafer in a single operation (i.e., following final polishing, a process or action is directed at the wafer which includes drying the wafer only once, thereby yielding a polished wafer surface substantially free of contaminants). The process comprising contacting the polished wafer with an aqueous solution comprising an oxidizing agent to oxidize organic carbon on the surface of the polished wafer. After oxidizing the organic carbon, immersing the polished wafer in an megasonically agitated alkaline cleaning solution to reduce the surface concentration of contaminant particles exceeding 0.2 &mgr;m in diameter. Withdrawing the polished wafer from the alkaline cleaning solution and rinsing it with deionized water. After rinsing, immersing the polished wafer in an acidic cleaning solution to reduce the surface concentration of contaminant metal atoms. Withdrawing the polished wafer from the acidic cleaning solution and immersing it in an ozonated aqueous bath.Type: GrantFiled: June 29, 2000Date of Patent: May 15, 2001Assignee: MEMC Electronic Materials, Inc.Inventors: M. Rao Yalamanchili, Kari B. Myli, Larry W. Shive
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Patent number: 5894711Abstract: A box handling apparatus having particular application in the packaging of semiconductor wafers, includes a box opening assembly which can unlatch a lid from a bottom of the box and separate the lid from the bottom. Arms can grip an article, such as a wafer cassette, in the bottom of the box and lift it out. The cassette can be loaded, or wafers already in the cassette unloaded. The apparatus can replace the loaded cassette in the bottom of the box and latchingly re-engage the lid.Type: GrantFiled: July 11, 1997Date of Patent: April 20, 1999Assignee: MEMC Electronic Materials, Inc.Inventors: James P. Davidson, Andrew Paul Lunday, Gordon P. Hampton, James C. Lenk, Gary L. Anderson, Larry W. Shive
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Patent number: 5855859Abstract: A gettering agent for gettering metals from a solution. The gettering agent has a surface layer of SiO.sub.2 which is greater than 15 angstroms in thickness.Type: GrantFiled: October 30, 1996Date of Patent: January 5, 1999Assignee: MEMC Electronic Materials, Inc.Inventors: Larry W. Shive, Saeed Pirooz
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Patent number: 5712198Abstract: Process for heat-treating a silicon wafer which includes the steps of contacting the surface of the silicon wafer with an aqueous solution containing hydrofluoric acid to remove metals from the wafer surface, contacting the hydrofluoric acid treated wafers with ozonated water to grow a hydrophilic oxide layer on the surface of the silicon wafer, and heating the ozonated water treated wafers to a temperature of at least about 300.degree. C. for a duration of at least about 1 second. The concentration of each of iron, chromium, calcium, titanium, cobalt, manganese, zinc and vanadium, on the surface of the silicon wafer at the initiation of the heating being less than 1.times.10.sup.9 atoms/cm.sup.2.Type: GrantFiled: December 7, 1995Date of Patent: January 27, 1998Assignee: MEMC Electronic Materials, Inc.Inventors: Larry W. Shive, Saeed Pirooz
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Patent number: 5622568Abstract: A process and a gettering agent for gettering metals from a solution. In the process, the solution is contacted with a gettering agent having a surface layer of SiO.sub.2, the layer of SiO.sub.2 preferably being greater than 15 angstroms in thickness.Type: GrantFiled: June 13, 1994Date of Patent: April 22, 1997Assignee: MEMC Electronic Materials, Inc.Inventors: Larry W. Shive, Saeed Pirooz
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Patent number: 5516730Abstract: Process for heat-treating a silicon wafer which includes the steps of contacting the surface of the silicon wafer with an aqueous solution containing hydrofluoric acid to remove metals from the wafer surface, contacting the hydrofluoric acid treated wafers with ozonated water to grow a hydrophilic oxide layer on the surface of the silicon wafer, and heating the ozonated water treated wafers to a temperature of at least about 300.degree. C. for a duration of at least about 1 second. The concentration of each of iron, chromium, calcium, titanium, cobalt, manganese, zinc and vanadium, on the surface of the silicon wafer at the initiation of the heating being less than 1.times.10.sup.9 atoms/cm.sup.2.Type: GrantFiled: August 26, 1994Date of Patent: May 14, 1996Assignee: MEMC Electronic Materials, Inc.Inventors: Saeed Pirooz, Larry W. Shive