Patents by Inventor Larry Witkowski

Larry Witkowski has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20230411314
    Abstract: The present disclosure provides methods and systems of generating high-efficiency structures for improved wireless communications. Such structures may comprise hard and chemically inert materials. Such structures may include materials having average thermal conductivities equal to or greater than about 1,000 W/mK. Such structures may comprise diamond. Such structures may comprise materials whose properties may be affected through processing such structures. Such structures may comprise devices with improved electron mobilities and efficiencies. Such structures may comprise substrate features. Such features may be configured to communicatively couple to a device or a component of a substrate. A device may comprise a radio transmitter. Some examples include satellite transmitters.
    Type: Application
    Filed: October 20, 2022
    Publication date: December 21, 2023
    Inventors: Paul SAUNIER, James CARROLL, Martha YARBOROUGH, Brian LORAN, Daniel FRANCIS, Larry WITKOWSKI
  • Patent number: 8901657
    Abstract: Embodiments include but are not limited to apparatuses and systems including an integrated capacitor. An integrated capacitor may include a substrate, a first capacitor plate having four edges, and a second capacitor plate overhanging the four edges of the first capacitor plate and disposed over the first capacitor plate such that the first capacitor plate is disposed between the second capacitor plate and the substrate.
    Type: Grant
    Filed: August 14, 2009
    Date of Patent: December 2, 2014
    Assignee: TriQuint Semiconductor, Inc.
    Inventors: Oleh Krutko, Larry Witkowski
  • Patent number: 7541232
    Abstract: A method for fabricating devices in a multi-layer structure adapted for the formation of enhancement mode high electron mobility transistors, depletion mode high electron mobility transistors, and power high electron mobility transistors includes defining gate recesses in the structure. The structure has, on a substrate, a channel layer, spacer layer on the channel layer, a first Schottky layer, a second Schottky layer on the first Schottky layer, and a third Schottky layer on the second Schottky layer, and a contact layer on the third Schottky layer. Etch stops are defined intermediate the first and second Schottky layers, intermediate the second and third Schottky layers, and intermediate the third Schottky layer and the contact layer.
    Type: Grant
    Filed: November 28, 2007
    Date of Patent: June 2, 2009
    Assignee: Lockheed Martin Corporation
    Inventors: Kevin L. Robinson, Larry Witkowski, Ming-Yih Kao
  • Publication number: 20080090345
    Abstract: A method for fabricating devices in a multi-layer structure adapted for the formation of enhancement mode high electron mobility transistors, depletion mode high electron mobility transistors, and power high electron mobility transistors includes defining gate recesses in the structure. The structure has, on a substrate, a channel layer, spacer layer on the channel layer, a first Schottky layer, a second Schottky layer on the first Schottky layer, and a third Schottky layer on the second Schottky layer, and a contact layer on the third Schottky layer. Etch stops are defined intermediate the first and second Schottky layers, intermediate the second and third Schottky layers, and intermediate the third Schottky layer and the contact layer.
    Type: Application
    Filed: November 28, 2007
    Publication date: April 17, 2008
    Inventors: Kevin Robinson, Larry Witkowski, Ming-Yih Kao
  • Patent number: 7321132
    Abstract: A multi-layer structure for use in the fabrication of integrated circuit devices is adapted for the formation of enhancement mode high electron mobility transistors, depletion mode high electron mobility transistors, and power high electron mobility transistors. The structure has, on a substrate, a channel layer, spacer layer on the channel layer, a first Schottky layer, a second Schottky layer on the first Schottky layer, and a third Schottky layer on the second Schottky layer, and a contact layer on the third Schottky layer. Etch stops are defined intermediate the first and second Schottky layers, intermediate the second and third Schottky layers, and intermediate the third Schottky layer and the contact layer.
    Type: Grant
    Filed: March 15, 2005
    Date of Patent: January 22, 2008
    Assignee: Lockheed Martin Corporation
    Inventors: Kevin L. Robinson, Larry Witkowski, Ming-Yih Kao
  • Publication number: 20060208279
    Abstract: A multi-layer structure for use in the fabrication of integrated circuit devices is adapted for the formation of enhancement mode high electron mobility transistors, depletion mode high electron mobility transistors, and power high electron mobility transistors. The structure has, on a substrate, a channel layer, spacer layer on the channel layer, a first Schottky layer, a second Schottky layer on the first Schottky layer, and a third Schottky layer on the second Schottky layer, and a contact layer on the third Schottky layer. Etch stops are defined intermediate the first and second Schottky layers, intermediate the second and third Schottky layers, and intermediate the third Schottky layer and the contact layer.
    Type: Application
    Filed: March 15, 2005
    Publication date: September 21, 2006
    Inventors: Kevin Robinson, Larry Witkowski, Ming-Yih Kao