Abstract: A two-channel amplifier with common signal including a splitter for establishing three intermediate signals on the basis of two input signals, wherein the three intermediate signals represent two channels, one of the three intermediate signals being a common signal common to both of the two channels and having a representation based on a sum of the two input signals.

Abstract: The invention relates to an A/D converter comprising an input and an output, a D/A converting feedback and a pulse width modulating forward path, the D/A converting feedback comprising at least one feed-back path, the feed-back path establishing a D/A conversion based on at least two D/A conversions subject to uncorrelated errors. The invention further relates to a jitter consequence reducing D/A-converter comprising a jitter-robust intermediate signal established on the basis of a digital input signal. The invention further relates to a method for jitter consequence reduction in a pulse width modulated A/D-converter feedback, comprising establishing at least two D/A-conversions subject to uncorrelated errors, and combining, preferably by summing, said at least two D/A-conversions.

Abstract: The invention relates to pulse width modulator system (PWMS) comprising a modulator system input (MI),a modulator output (MO), an amplitude distribution filter (ADF) ,and a pulse width modulator (PMOD), wherein said amplitude distribution filter (ADF) establishes an intermediate output signal (OS) by modifying the level of the amplitude distribution of an input signal (IS) within at least one predetermined amplitude range of said input signal (IS), said input signal (IS) being received from said modulator system input (MI), and wherein said pulse width modulator (PMOD) provides a modulator output signal (MOS) on said modulator output(MO) on the basis of said intermediate output signal (OS).

Abstract: The invention relates to a high-mode self-oscillating pulse modulator. According to the invention, a complete rethinking of preconditions for oscillation and modulation in an oscillating modulator as all conventional thinking of how to apply oscillation in a modulator has been set aside. Thus, according to the invention, high-mode oscillation refers to an oscillation at a higher mode than the first mode, which is conventionally regarded as the one and only applicable mode in an oscillating modulator.

Abstract: The present invention relates to a self-oscillating modulator (2) comprising a PWM cycle constrainer (21). The present invention further relates to a method of stabilising the switch frequency of a self-oscillating modulator operating on a high level input signal, whereby at least one PWM cycle constraint representative signal (26, 32, 33) is applied to a pulse width modulated signal (18) within said self-oscillating modulator (2). The present invention further relates to a method of avoiding pulses narrower than a predetermined minimum pulse width or wider than a predetermined maximum pulse width in a self-oscillating modulator (2) operating on a high level input signal, whereby at least one PWM cycle constraint representative signal (26, 32, 33) is applied to a pulse width modulated signal (18) within said self-oscillating modulator.

Abstract: The invention relates to an amplifier comprising amplification means (AM) comprising an input and an output, said amplification means (AM) comprising a switching output stage delivering at least one output signal (OUS) via said output, said amplification means being fed by power supply means (PSM) said amplifier further comprising compensation means (CM) providing a compensation signal (CS) derived from the power supply voltage (PSV) of the power supply means (PSM), said compensation signal (CS) comprising a substantially inverse representation of said power supply voltage (PSV) and said compensation signal (CS) being fed to said amplification means (AM). According to the invention, an effective error compensation of the output switching stage may in practice be implemented by establishment of a compensation, which on a run-time basis is based on the voltage of the power supply currently applied in the output switching stage.

Abstract: The invention relates to an amplifier comprising amplification means (AM) comprising an input and an output, said amplification means (AM) comprising a switching output stage delivering at least one output signal (OUS) via said output, said amplification means being fed by power supply means (PSM) said amplifier further comprising compensation means (CM) providing a compensation signal (CS) derived from the power supply voltage (PSV) of the power supply means (PSM), said compensation signal (CS) comprising a substantially inverse representation of said power supply voltage (PSV) and said compensation signal (CS) being fed to said amplification means (AM). According to the invention, an effective error compensation of the output switching stage may in practice be implemented by establishment of a compensation, which on a run-time basis is based on the voltage of the power supply currently applied in the output switching stage.

Abstract: The invention relates to pulse width modulator system (PWMS) comprising a modulator system input (MI), a modulator output (MO), an amplitude distribution filter (ADF), and a pulse width modulator (PMOD), wherein said amplitude distribution filter (ADF) establishes an intermediate output signal (OS) by modifying the level of the amplitude distribution of an input signal (IS) within at least one predetermined amplitude range of said input signal (IS), said input signal (IS) being received from said modulator system input (MI), and wherein said pulse width modulator (PMOD) provides a modulator output signal (MOS) on said modulator output (MO) on the basis of said intermediate output signal (OS).

Abstract: The present invention relates to a multi-channel pulse modulator system comprising a pulse modulator circuit, wherein said pulse modulator circuit comprises an N-channel, wherein the modulator output is output from the pulse modulator circuit by means of L output connections of the pulse modulator circuit and where L is less than the number of modulator channels N. The invention further relates to a method of converting an N-channel pulse modulated signal into an M-channel signal, where M is less than N.

Abstract: The invention relates to at least one self-oscillating loop (SOL) comprising at least one forward path (FP), at least one feedback path (FBP) wherein said at least one forward path (FP) comprises amplitude quantizing means (AQM) combined with time quantizing means (TQM) and outputting at least one time and amplitude quantized signal (OS). According to the invention, a high-speed high-resolution A/D converter may be obtained.

Abstract: The invention relates to at least one self-oscillating loop (SOL) comprising at least one forward path (FP), at least one feedback path (FBP) wherein said at least one forward path (FP) comprises amplitude quantizing means (AQM) combined with time quantizing means (TQM) and outputting at least one time and amplitude quantized signal (OS). According to the invention, a high-speed high-resolution A/D converter may be obtained.

Abstract: The invention relates to an amplifier comprising amplification means (AM) comprising an input and an output, said amplification means (AM) comprising a switching output stage delivering at least one output signal (OUS) via said output, said amplification means being fed by power supply means (PSM) said amplifier further comprising compensation means (CM) providing a compensation signal (CS) derived from the power supply voltage (PSV) of the power supply means (PSM), said compensation signal (CS) comprising a substantially inverse representation of said power supply voltage (PSV) and said compensation signal (CS) being fed to said amplification means (AM). According to the invention, an effective error compensation of the output switching stage may in practice be implemented by establishment of a compensation, which on a run-time basis is based on the voltage of the power supply currently applied in the output switching stage.

Abstract: The invention relates to at least one self-oscillating loop (SOL) comprising at least one forward path (FP), at least one feedback path (FBP) wherein said at least one forward path (FP) comprises amplitude quantizing means (AQM) combined with time quantizing means (TQM) and outputting at least one time and amplitude quantized signal (OS). According to the invention, a high-speed high-resolution A/D converter may be obtained.

Abstract: The invention relates to a method of estimating an intersection between at least two continuous signal representations in a pulse width modulator, at least one of the continuous signal representations being non-linear, the method comprising the step of providing an intersection estimate between the at least two continuous signal representations by means of at least one equation representing an expansion of at least one iteration comprising at least one iterative call of a function describing the continuous signal representation being non-linear and whereby the estimating of intersections are performed in a pulse width modulation modulator. According to an embodiment of the invention, a simple iterative call of the established continuous signal representation, e.g. an interpolation polynomial, will provide the desired intersection. It should be noted that the established estimate might be provided without any complicated root solving and avoiding division and even square root.

Abstract: The invention relates to a method of estimating an intersection between at least two continuous signal representations (SR1, SR2) in a pulse width modulator, at least one of said continuous signal representations (SR1, SR2) being non-linear, said method comprising the step of providing an intersection estimate (CPE) between said at least two continuous signal representations on the basis of at least one iteration comprising at least one iterative call of a function describing said continuous signal representations (SR1, SR2) being non-linear and whereby said estimating of intersections are performed in a pulse width modulation modulator. According to an embodiment of the invention, a simple iterative call of the established continuous signal representation, e.g. an interpolation polynomial, will provide the desired intersection. It should be noted that the established estimate might be provided without any complicated root solving and avoiding division and even square root.

Abstract: The invention relates to a hardware implemented filtering method including establishing a representation DIS of the derivative of at least a part of a time-quantized input signal IS, and establishing at least one sample of a time- and amplitude-quantized output signal OS by performing filtering on the basis of at least a part of a filter representation IFC1, IFC2, IFC3 and the representation DIS of the derivative of at least a part of the input signal IS. The invention further relates to a hardware implemented decimation method for decimating a time-quantized input signal IS including dividing the time-quantized input signal IS into intervals, for each of the intervals establishing a sample of a time- and amplitude-quantized output signal OS according to the above mentioned filtering method. The invention further relates to a fast filtering means FFM implementing the above-mentioned methods.

Abstract: The invention relates to a method of establishing a PWM-modulated output signal representation (OS), providing a stream of parallelly determined intersection representations (PIR) on the basis of a stream of parallel reference signal representation (PRSR) and an input signal (IS), establishing a serial PWM output signal representation (OS) by transforming said stream of parallelly determined intersection representations (PIR) into a stream of serial intersection representations (SIR) by means of a relative time shift of at least one of said parallelly determined intersections (PIR). According to an embodiment of the invention, an advantageous way of providing intersection estimates has been obtained, as each or at least a number of intersection estimates between a reference signal and an input signal may be established partially while taking only the individual partial reference functions into consideration.

Abstract: The invention relates to a method of estimating an intersection between at least two continuous signal representations (SR1, SR2) in a pulse width modulator, at least one of said continuous signal representations (SR1, SR2) being non-linear, said method comprising the step of providing an intersection estimate (CPE) between said at least two continuous signal representations on the basis of at least one iteration comprising at least one iterative call of a function describing said continuous signal representations (SR1, SR2) being non-linear and whereby said estimating of intersections are performed in a pulse width modulation modulator. According to an embodiment of the invention, a simple iterative call of the established continuous signal representation, e.g. an interpolation polynomial, will provide the desired intersection. It should be noted that the established estimate might be provided without any complicated root solving and avoiding division and even square root.

Abstract: The invention relates to at least one self-oscillating loop (SOL) comprising at least one forward path (FP), at least one feedback path (FBP) wherein said at least one forward path (FP) comprises amplitude quantizing means (AQM) combined with time quantizing means (TQM) and outputting at least one time and amplitude quantized signal (OS). According to the invention, a high-speed high-resolution A/D converter may be obtained.

Abstract: An apparatus for processing auscultation signals, e.g. embedded in an electronic stethoscope with a digital readout of an estimated heart rate. The apparatus comprises a bias processor for receiving an auscultation signal and providing a biased auscultation signal; said bias processor comprising an envelope detector and an estimator for calculating a signal representative of the beat frequency of the auscultation signal. In one aspect the information in the biased auscultation signal that is in conformity with the repeated information in the auscultation signal is enhanced. This may e.g. be done by calculating the conformity between the biased auscultation and at least a part of the biased auscultation signal. In another aspect of the invention the auscultation signal is biased by means of A-weighing. Preferably the two aspects of the invention are combined.