Abstract: A system and method for tracking noise in a received signal uses a forward/backward Decision-Directed Phase Tracking Loop to generate a phase-noise compensation signal that removes phase noise from received single-carrier signals.

Abstract: An apparatus is provided. In the apparatus, an input to index (I2I) module maps a complex input into a real signal. A real data tap delay line is coupled to the I2I module and includes N delay-elements. A complex data tap delay line is configured to receive the complex input and includes M delay elements. A set of K of non-linear function modules is also provided. Each non-linear function module from the set has at least one real input, at least one complex input, and at least one complex output. A configurable connectivity crossbar multiplexer couples K of the N real tap delay line elements to real inputs of the set non-linear functions and couples K of the M complex tap delay line elements to complex inputs of the set non-linear function modules.

Abstract: Systems and methods for power amplifier pre-distortion are provided. The systems and methods of power amplifier digital pre-distortion disclosed herein may include a generic pre-distorter architecture which can implement a variety of Volterra cross terms involving single dimension convolutions (first order dynamics). For hardware implementations, this generic pre-distorter is further fine-tuned to provide a choice between different sets of cross terms that can be selected for a given PA for optimal performance. The novel pre-distorter architecture provides flexibility to trade off memory depth for additional Volterra terms and vice versa. A further novelty is the ability to trade off both memory depth and cross terms for a higher sample rate operation, which may enable higher order non-linear pre-distortion, or support for higher signal bandwidths. A poly-phase non-linear filtering mode allows for this flexibility.

Abstract: A system and method for providing a static mode for logic circuits with dynamic latches. The invention provides a reliable static mode for testing of the logic circuit, prevents "through current" power consumption when docks to the logic circuit are stopped, and allows the circuit to be powered down when idle. The system includes a circuit for forcing clock phases to an active state, a circuit for breaking feedback paths within the logic circuit, and an optional clock loss detector for detecting clock inactivity and automatically initiating the static mode.

Abstract: A system and method for providing a static mode for logic circuits with dynamic latches. The invention provides a reliable static mode for testing of the logic circuit, prevents "through current" power consumption when clocks to the logic circuit are stopped, and allows the circuit to be powered down when idle. The system includes a circuit for forcing clock phases to an active state, a circuit for breaking feedback paths within the logic circuit, and an optional clock loss detector for detecting clock inactivity and automatically initiating the static mode.

Abstract: A signal processing system and method for stabilizing cascaded integrator-comb (CIC) interpolation filters. The signal processing system includes an overflow detection circuit and reset circuitry. The overflow detection circuit monitors the output of the CIC interpolation filter for an overflow condition which is indicative of filter instability. When an overflow condition is detected, the reset circuitry automatically resets the filter, thereby eliminating the instability.