Patents by Inventor Lars-Peter Jacobson

Lars-Peter Jacobson has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Method and system for improving a transistor model
    Patent number: 6532438
    Abstract: An improved system for simulating bipolar transistors with a variation in Early voltage as a function of collector/emitter bias voltage is disclosed. The simulation is based upon a standard Gummel-Poon model and is improved by an Early voltage extension, where the constant Early voltage is replaced by an Early voltage that is divided into several regions. The Early voltage is adjusted to fit the actual variations of the measured Early voltage characteristics of a bipolar transistor. The Early voltage within each region is used for calculating the bipolar transistors base charge which then is used to simulate the performance of the bipolar transistor. The regions may be linked together by choice of boundary conditions.
    Type: Grant
    Filed: November 30, 1998
    Date of Patent: March 11, 2003
    Assignee: Telefonaktiebolaget LM Ericsson
    Inventors: Håkan Sjödin, Hans Hjelmgren, Lars-Peter Jacobson, Anders Eklund
  • METHOD AND SYSTEM FOR IMPROVING A TRANSISTOR MODEL
    Publication number: 20020013682
    Abstract: The present invention relates to an improved system for simulating bipolar transistors with a variation in Early voltage as a function of collector/emitter bias voltage. The simulation is based upon a standard Gummel-Poon model and is improved by an Early voltage extension, where the constant Early voltage is replaced by an Early voltage that is divided into several regions. The Early voltage is adjusted to fit the actual variations of the measured Early voltage characteristics of a bipolar transistor. The Early voltage within each region is used for calculating the bipolar transistors base charge (qb) which then is used to simulate the performance of the bipolar transistor. The regions may be linked together by choice of boundary conditions.
    Type: Application
    Filed: November 30, 1998
    Publication date: January 31, 2002
    Inventors: HAKAN SJODIN, HANS HJELMGREN, LARS-PETER JACOBSON, ANDERS EKLUND